/*******************************************************************************
 *
 * $Id: $
 * Copyright: (c) 2018 Broadcom. All Rights Reserved. "Broadcom" refers to 
 * Broadcom Limited and/or its subsidiaries.
 * 
 * Broadcom Switch Software License
 * 
 * This license governs the use of the accompanying Broadcom software. Your 
 * use of the software indicates your acceptance of the terms and conditions 
 * of this license. If you do not agree to the terms and conditions of this 
 * license, do not use the software.
 * 1. Definitions
 *    "Licensor" means any person or entity that distributes its Work.
 *    "Software" means the original work of authorship made available under 
 *    this license.
 *    "Work" means the Software and any additions to or derivative works of 
 *    the Software that are made available under this license.
 *    The terms "reproduce," "reproduction," "derivative works," and 
 *    "distribution" have the meaning as provided under U.S. copyright law.
 *    Works, including the Software, are "made available" under this license 
 *    by including in or with the Work either (a) a copyright notice 
 *    referencing the applicability of this license to the Work, or (b) a copy 
 *    of this license.
 * 2. Grant of Copyright License
 *    Subject to the terms and conditions of this license, each Licensor 
 *    grants to you a perpetual, worldwide, non-exclusive, and royalty-free 
 *    copyright license to reproduce, prepare derivative works of, publicly 
 *    display, publicly perform, sublicense and distribute its Work and any 
 *    resulting derivative works in any form.
 * 3. Grant of Patent License
 *    Subject to the terms and conditions of this license, each Licensor 
 *    grants to you a perpetual, worldwide, non-exclusive, and royalty-free 
 *    patent license to make, have made, use, offer to sell, sell, import, and 
 *    otherwise transfer its Work, in whole or in part. This patent license 
 *    applies only to the patent claims licensable by Licensor that would be 
 *    infringed by Licensor's Work (or portion thereof) individually and 
 *    excluding any combinations with any other materials or technology.
 *    If you institute patent litigation against any Licensor (including a 
 *    cross-claim or counterclaim in a lawsuit) to enforce any patents that 
 *    you allege are infringed by any Work, then your patent license from such 
 *    Licensor to the Work shall terminate as of the date such litigation is 
 *    filed.
 * 4. Redistribution
 *    You may reproduce or distribute the Work only if (a) you do so under 
 *    this License, (b) you include a complete copy of this License with your 
 *    distribution, and (c) you retain without modification any copyright, 
 *    patent, trademark, or attribution notices that are present in the Work.
 * 5. Derivative Works
 *    You may specify that additional or different terms apply to the use, 
 *    reproduction, and distribution of your derivative works of the Work 
 *    ("Your Terms") only if (a) Your Terms provide that the limitations of 
 *    Section 7 apply to your derivative works, and (b) you identify the 
 *    specific derivative works that are subject to Your Terms. 
 *    Notwithstanding Your Terms, this license (including the redistribution 
 *    requirements in Section 4) will continue to apply to the Work itself.
 * 6. Trademarks
 *    This license does not grant any rights to use any Licensor's or its 
 *    affiliates' names, logos, or trademarks, except as necessary to 
 *    reproduce the notices described in this license.
 * 7. Limitations
 *    Platform. The Work and any derivative works thereof may only be used, or 
 *    intended for use, with a Broadcom switch integrated circuit.
 *    No Reverse Engineering. You will not use the Work to disassemble, 
 *    reverse engineer, decompile, or attempt to ascertain the underlying 
 *    technology of a Broadcom switch integrated circuit.
 * 8. Termination
 *    If you violate any term of this license, then your rights under this 
 *    license (including the license grants of Sections 2 and 3) will 
 *    terminate immediately.
 * 9. Disclaimer of Warranty
 *    THE WORK IS PROVIDED "AS IS" WITHOUT WARRANTIES OR CONDITIONS OF ANY 
 *    KIND, EITHER EXPRESS OR IMPLIED, INCLUDING WARRANTIES OR CONDITIONS OF 
 *    MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE OR 
 *    NON-INFRINGEMENT. YOU BEAR THE RISK OF UNDERTAKING ANY ACTIVITIES UNDER 
 *    THIS LICENSE. SOME STATES' CONSUMER LAWS DO NOT ALLOW EXCLUSION OF AN 
 *    IMPLIED WARRANTY, SO THIS DISCLAIMER MAY NOT APPLY TO YOU.
 * 10. Limitation of Liability
 *    EXCEPT AS PROHIBITED BY APPLICABLE LAW, IN NO EVENT AND UNDER NO LEGAL 
 *    THEORY, WHETHER IN TORT (INCLUDING NEGLIGENCE), CONTRACT, OR OTHERWISE 
 *    SHALL ANY LICENSOR BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY DIRECT, 
 *    INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT OF 
 *    OR RELATED TO THIS LICENSE, THE USE OR INABILITY TO USE THE WORK 
 *    (INCLUDING BUT NOT LIMITED TO LOSS OF GOODWILL, BUSINESS INTERRUPTION, 
 *    LOST PROFITS OR DATA, COMPUTER FAILURE OR MALFUNCTION, OR ANY OTHER 
 *    COMMERCIAL DAMAGES OR LOSSES), EVEN IF THE LICENSOR HAS BEEN ADVISED OF 
 *    THE POSSIBILITY OF SUCH DAMAGES.
 * 
 * 
 *
 * DO NOT EDIT THIS FILE!
 * This file is auto-generated from the registers file.
 * Edits to this file will be lost when it is regenerated.
 *
 * Symbol table file for the BCMI_EAGLE_XGXS.
 * This symbol table is used by the Broadcom debug shell.
 */


#include <phymod/chip/bcmi_eagle_xgxs_defs.h>
#include <phymod/phymod_symbols.h>

/* No symbols will be compiled unless this is defined. */
#if PHYMOD_CONFIG_INCLUDE_CHIP_SYMBOLS == 1
/*******************************************************************************
 *
 * If PHYMOD_CONFIG_INCLUDE_FIELD_INFO is 1, then symbol information
 * necessary to encode and decode the individual fields of a register or memory
 * will be available.
 *
 * Without it, only the register and memory names will be symbolically available
 * and their values will be displayed as raw data only. 
 *
 * Field information can be compiled out in the interest of saving code space.
 */
#if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS

static uint32_t BCMI_EAGLE_XGXS_ACC_ADDR_DATAr_fields[] =
{
    /* MDIO_ADDR_DATA:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(443, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_ACC_CTLr_fields[] =
{
    /* MDIO_DEVAD:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(447, 4, 0),
    /* MDIO_FUNCTION:14:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(454, 15, 14)
};
static uint32_t BCMI_EAGLE_XGXS_AMS_CTL0r_fields[] =
{
    /* AMS_PLL_LOWPWR_6G:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(72, 0, 0),
    /* AMS_PLL_TXCG_VDDR_BGB:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(92, 1, 1),
    /* AMS_PLL_IMIN_ICLKINT:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(54, 2, 2),
    /* AMS_PLL_IMAX_ICLKINT:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(44, 3, 3),
    /* AMS_PLL_IMODE_ICLKINT:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(64, 4, 4),
    /* AMS_PLL_IMIN_ICKGEN:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(52, 5, 5),
    /* AMS_PLL_IMAX_ICKGEN:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(42, 6, 6),
    /* AMS_PLL_IMODE_ICKGEN:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(62, 7, 7),
    /* AMS_PLL_IMIN_ICLKIDRV1:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(53, 8, 8),
    /* AMS_PLL_IMAX_ICLKIDRV1:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(43, 9, 9),
    /* AMS_PLL_IMODE_ICLKIDRV1:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(63, 10, 10),
    /* AMS_PLL_CAL_OFF:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(23, 11, 11),
    /* AMS_PLL_CAL_AUX:12:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(22, 15, 12)
};
static uint32_t BCMI_EAGLE_XGXS_AMS_CTL1r_fields[] =
{
    /* AMS_PLL_DBLR_CTRL:0:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(25, 1, 0),
    /* AMS_PLL_SPARE_18:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(84, 2, 2),
    /* AMS_PLL_FP3_RH:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(32, 3, 3),
    /* AMS_PLL_FP3_CTRL:4:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(31, 5, 4),
    /* AMS_PLL_VCO_DIV2:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(96, 6, 6),
    /* AMS_PLL_VCO_DIV4:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(97, 7, 7),
    /* AMS_PLL_VCOICTRL:8:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(95, 9, 8),
    /* AMS_PLL_VCO_IMAX:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(98, 10, 10),
    /* AMS_PLL_IVCO:11:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(70, 13, 11),
    /* AMS_PLL_RESET:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(82, 14, 14),
    /* AMS_PLL_ENABLE_FTUNE:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(27, 15, 15)
};
static uint32_t BCMI_EAGLE_XGXS_AMS_CTL2r_fields[] =
{
    /* AMS_PLL_EN_HRZ:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(28, 0, 0),
    /* AMS_PLL_IQP:1:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(69, 4, 1),
    /* AMS_PLL_REFL_PLL:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(81, 5, 5),
    /* AMS_PLL_REFH_PLL:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(80, 6, 6),
    /* AMS_PLL_IMIN_IBIAS:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(50, 7, 7),
    /* AMS_PLL_IMODE_IBIAS:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(60, 8, 8),
    /* AMS_PLL_IMAX_IBIAS:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(40, 9, 9),
    /* AMS_PLL_IMIN_ICP:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(57, 10, 10),
    /* AMS_PLL_IMODE_ICP:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(67, 11, 11),
    /* AMS_PLL_IMAX_ICP:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(47, 12, 12),
    /* AMS_PLL_IMIN_ICK:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(51, 13, 13),
    /* AMS_PLL_IMODE_ICK:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(61, 14, 14),
    /* AMS_PLL_IMAX_ICK:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(41, 15, 15)
};
static uint32_t BCMI_EAGLE_XGXS_AMS_CTL3r_fields[] =
{
    /* AMS_PLL_IMIN_I10GBUF:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(49, 0, 0),
    /* AMS_PLL_IMODE_I10GBUF:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(59, 1, 1),
    /* AMS_PLL_IMAX_I10GBUF:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(39, 2, 2),
    /* AMS_PLL_IMIN_ICML:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(55, 3, 3),
    /* AMS_PLL_IMODE_ICML:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(65, 4, 4),
    /* AMS_PLL_IMAX_ICML:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(45, 5, 5),
    /* AMS_PLL_IMIN_ICOMP:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(56, 6, 6),
    /* AMS_PLL_IMODE_ICOMP:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(66, 7, 7),
    /* AMS_PLL_IMAX_ICOMP:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(46, 8, 8),
    /* AMS_PLL_IMIN_IOP:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(58, 9, 9),
    /* AMS_PLL_IMODE_IOP:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(68, 10, 10),
    /* AMS_PLL_IMAX_IOP:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(48, 11, 11),
    /* AMS_PLL_TEST_VREF:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(91, 12, 12),
    /* AMS_PLL_TEST_VC:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(90, 13, 13),
    /* AMS_PLL_TEST_PLL:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(87, 14, 14),
    /* AMS_PLL_TEST_RX:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(89, 15, 15)
};
static uint32_t BCMI_EAGLE_XGXS_AMS_CTL4r_fields[] =
{
    /* AMS_PLL_BGR_PTATADJ:0:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(21, 3, 0),
    /* AMS_PLL_BGR_CTATADJ:4:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(20, 7, 4),
    /* AMS_PLL_2RX_CLKBW:8:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(15, 9, 8),
    /* AMS_PLL_COMP_VTH:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(24, 10, 10),
    /* AMS_PLL_VDDR_BGB:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(99, 11, 11),
    /* AMS_PLL_KVH_FORCE:12:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(71, 13, 12),
    /* AMS_PLL_FORCE_KVH_BW:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(29, 14, 14),
    /* AMS_PLL_FORCE_RESCAL:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(30, 15, 15)
};
static uint32_t BCMI_EAGLE_XGXS_AMS_CTL5r_fields[] =
{
    /* AMS_PLL_MAX_TEST_PORT_AMPL:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(73, 0, 0),
    /* AMS_PLL_BGIP:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(19, 1, 1),
    /* AMS_PLL_BGINT:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(18, 2, 2),
    /* AMS_PLL_VBYPASS:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(94, 3, 3),
    /* AMS_PLL_TEST_PNP:4:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(88, 5, 4),
    /* AMS_PLL_BGCALR_CTATADJ:6:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(16, 10, 6),
    /* AMS_PLL_BGCALR_PTATADJ:11:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(17, 15, 11)
};
static uint32_t BCMI_EAGLE_XGXS_AMS_CTL6r_fields[] =
{
    /* AMS_PLL_TEST_FRACN_EN:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(86, 0, 0),
    /* AMS_PLL_PDF_SKEW_ENLARGE:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(78, 1, 1),
    /* AMS_PLL_PDF_FD_SKEW:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(76, 2, 2),
    /* AMS_PLL_PDF_REF_SKEW:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(77, 3, 3),
    /* AMS_PLL_SPARE_100:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(83, 4, 4),
    /* AMS_PLL_REFCLK_DOUBLER:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(79, 5, 5),
    /* AMS_PLL_MIX2P1CR_CTATADJ:6:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(74, 10, 6),
    /* AMS_PLL_MIX2P1CR_PTATADJ:11:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(75, 15, 11)
};
static uint32_t BCMI_EAGLE_XGXS_AMS_CTL7r_fields[] =
{
    /* AMS_PLL_FRACN_DIV_L:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(36, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_AMS_CTL8r_fields[] =
{
    /* AMS_PLL_FRACN_DIV_H:0:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(35, 1, 0),
    /* AMS_PLL_FRACN_DIVRANGE:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(34, 2, 2),
    /* AMS_PLL_FRACN_BYPASS:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(33, 3, 3),
    /* AMS_PLL_FRACN_NDIV_INT:4:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(37, 13, 4),
    /* AMS_PLL_DITHEREN:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(26, 14, 14),
    /* AMS_PLL_FRACN_SEL:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(38, 15, 15)
};
static uint32_t BCMI_EAGLE_XGXS_AMS_INTCTLr_fields[] =
{
    /* AMS_PLL_TX_LOWPWR_6G:0:0 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(93, 0, 0)
};
static uint32_t BCMI_EAGLE_XGXS_AMS_RX_CTL0r_fields[] =
{
    /* AMS_RX_SEL_DFECKDELAY:0:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(147, 1, 0),
    /* AMS_RX_PHASE_INT_AMPL_CTRL:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(145, 2, 2),
    /* AMS_RX_SIGDET_THRESHOLD:3:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(152, 5, 3),
    /* AMS_RX_SIG_PWRDN:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(153, 6, 6),
    /* AMS_RX_VGA_OUTPUT_IDLE:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(164, 7, 7),
    /* AMS_RX_TPORT_EN:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(162, 8, 8),
    /* AMS_RX_SIGDET_BYPASS:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(150, 9, 9),
    /* AMS_RX_SIGDET_LOW_POWER:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(151, 10, 10),
    /* AMS_RX_VGA_BW_EXTENSION:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(163, 11, 11),
    /* AMS_RX_DC_COUPLE:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(100, 12, 12),
    /* AMS_RX_EN_10GMODE:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(104, 13, 13),
    /* AMS_RX_IMIN_COMMONMODE:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(121, 14, 14),
    /* AMS_RX_IMOD_COMMONMODE:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(144, 15, 15)
};
static uint32_t BCMI_EAGLE_XGXS_AMS_RX_CTL1r_fields[] =
{
    /* AMS_RX_IMAX_COMMONMODE:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(109, 0, 0),
    /* AMS_RX_IMIN_PHASE_INT:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(128, 1, 1),
    /* AMS_RX_IMODE_PHASE_INT:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(139, 2, 2),
    /* AMS_RX_IMAX_PHASE_INT:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(116, 3, 3),
    /* AMS_RX_IMIN_VGA:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(132, 4, 4),
    /* AMS_RX_IMODE_VGA:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(143, 5, 5),
    /* AMS_RX_IMAX_VGA:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(120, 6, 6),
    /* AMS_RX_IMIN_DFE_SUMMER:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(124, 7, 7),
    /* AMS_RX_IMODE_DFE_SUMMER:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(135, 8, 8),
    /* AMS_RX_IMAX_DFE_SUMMER:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(112, 9, 9),
    /* AMS_RX_IMIN_PF:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(127, 10, 10),
    /* AMS_RX_IMODE_PF:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(138, 11, 11),
    /* AMS_RX_IMAX_PF:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(115, 12, 12),
    /* AMS_RX_IMIN_CTAT:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(122, 13, 13),
    /* AMS_RX_IMODE_CTAT:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(133, 14, 14),
    /* AMS_RX_IMAX_CTAT:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(110, 15, 15)
};
static uint32_t BCMI_EAGLE_XGXS_AMS_RX_CTL2r_fields[] =
{
    /* AMS_RX_SPARE_32:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(154, 0, 0),
    /* AMS_RX_SPARE_33:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(155, 1, 1),
    /* AMS_RX_SPARE_34:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(156, 2, 2),
    /* AMS_RX_IMIN_SLICER:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(131, 3, 3),
    /* AMS_RX_IMODE_SLICER:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(142, 4, 4),
    /* AMS_RX_IMAX_SLICER:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(119, 5, 5),
    /* AMS_RX_IMIN_DFE_TAP_WEIGHT:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(125, 6, 6),
    /* AMS_RX_IMODE_DFE_TAP_WEIGHT:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(136, 7, 7),
    /* AMS_RX_IMAX_DFE_TAP_WEIGHT:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(113, 8, 8),
    /* AMS_RX_SEL_UGBW:9:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(149, 10, 9),
    /* AMS_RX_SEL_TH4DFE:11:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(148, 12, 11),
    /* AMS_RX_EN_VCCTRL:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(105, 13, 13),
    /* AMS_RX_SPARE_46:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(157, 14, 14),
    /* AMS_RX_SPARE_47:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(158, 15, 15)
};
static uint32_t BCMI_EAGLE_XGXS_AMS_RX_CTL3r_fields[] =
{
    /* AMS_RX_IMIN_DC_OFFSET_DAC:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(123, 0, 0),
    /* AMS_RX_IMODE_DC_OFFSET_DAC:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(134, 1, 1),
    /* AMS_RX_IMAX_DC_OFFSET_DAC:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(111, 2, 2),
    /* AMS_RX_IMIN_PHASE_INT_P1:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(129, 3, 3),
    /* AMS_RX_IMODE_PHASE_INT_P1:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(140, 4, 4),
    /* AMS_RX_IMAX_PHASE_INT_P1:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(117, 5, 5),
    /* AMS_RX_IMIN_METRES_EYEDIAG:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(126, 6, 6),
    /* AMS_RX_IMODE_METRES_EYEDIAG:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(137, 7, 7),
    /* AMS_RX_IMAX_METRES_EYEDIAG:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(114, 8, 8),
    /* AMS_RX_IMIN_SIGNAL_DETECT:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(130, 9, 9),
    /* AMS_RX_IMODE_SIGNAL_DETECT:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(141, 10, 10),
    /* AMS_RX_IMAX_SIGNAL_DETECT:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(118, 11, 11),
    /* AMS_RX_I4DEADZONE:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(108, 12, 12),
    /* AMS_RX_I1P25DFE:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(107, 13, 13),
    /* AMS_RX_SPARE_62:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(159, 14, 14),
    /* AMS_RX_SPARE_63:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(160, 15, 15)
};
static uint32_t BCMI_EAGLE_XGXS_AMS_RX_CTL4r_fields[] =
{
    /* AMS_RX_DC_OFFSET:0:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(101, 6, 0),
    /* AMS_RX_FORCE_DC_OFFSET:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(106, 7, 7),
    /* AMS_RX_DC_OFFSET_RANGE:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(102, 8, 8),
    /* AMS_RX_VGA_RESCAL_MUX:9:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(165, 11, 9),
    /* AMS_RX_PHS_INTERP_RESCAL_MUX:12:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(146, 15, 12)
};
static uint32_t BCMI_EAGLE_XGXS_AMS_RX_INTCTLr_fields[] =
{
    /* AMS_RX_DFE_OS2X_MODE:0:0 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(103, 0, 0)
};
static uint32_t BCMI_EAGLE_XGXS_AMS_RX_STSr_fields[] =
{
    /* AMS_RX_STS:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(161, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_AMS_STSr_fields[] =
{
    /* AMS_PLL_STS:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(85, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_AMS_TX_CTL0r_fields[] =
{
    /* AMS_TX_OSR4:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(178, 0, 0),
    /* AMS_TX_SPARE_1:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(184, 1, 1),
    /* AMS_TX_SPARE_2:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(185, 2, 2),
    /* AMS_TX_SPARE_3:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(186, 3, 3),
    /* AMS_TX_TEST_DATA:4:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(189, 5, 4),
    /* AMS_TX_TICKSEL:6:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(190, 7, 6),
    /* AMS_TX_KR_TEST_MODE:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(176, 8, 8),
    /* AMS_TX_DCC_SEL:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(170, 9, 9),
    /* AMS_TX_DCC_DIS:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(169, 10, 10),
    /* AMS_TX_CAL_OFF:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(168, 11, 11),
    /* AMS_TX_CAL_AUX:12:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(167, 15, 12)
};
static uint32_t BCMI_EAGLE_XGXS_AMS_TX_CTL1r_fields[] =
{
    /* AMS_TX_IBIAS:0:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(173, 2, 0),
    /* AMS_TX_IDCC:3:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(175, 5, 3),
    /* AMS_TX_ICML:6:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(174, 8, 6),
    /* AMS_TX_SPARE_30_25:9:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(187, 14, 9),
    /* AMS_TX_LP_OVRD:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(177, 15, 15)
};
static uint32_t BCMI_EAGLE_XGXS_AMS_TX_CTL2r_fields[] =
{
    /* AMS_TX_AMP_CTL:0:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(166, 3, 0),
    /* AMS_TX_POST3_COEF:4:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(180, 6, 4),
    /* AMS_TX_SIGN_POST3:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(183, 7, 7),
    /* AMS_TX_POST2_COEF:8:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(179, 11, 8),
    /* AMS_TX_SIGN_POST2:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(182, 12, 12),
    /* AMS_TX_DRIVERMODE:13:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(171, 14, 13),
    /* AMS_TX_ELEC_IDLE_AUX:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(172, 15, 15)
};
static uint32_t BCMI_EAGLE_XGXS_AMS_TX_INTCTLr_fields[] =
{
    /* AMS_TX_SEL_HALFRATE:0:0 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(181, 0, 0)
};
static uint32_t BCMI_EAGLE_XGXS_AMS_TX_STSr_fields[] =
{
    /* AMS_TX_STS:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(188, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_CKRST_CLK_N_RST_DBG_CTLr_fields[] =
{
    /* LN_RX_S_CLKGATE_FRC_ON:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(426, 0, 0),
    /* LN_RX_S_COMCLK_SEL:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(428, 1, 1),
    /* LN_RX_S_COMCLK_FRC_ON:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(427, 2, 2),
    /* PMD_RX_CLK_VLD_FRC:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(573, 3, 3),
    /* PMD_RX_CLK_VLD_FRC_VAL:4:4 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(574, 4, 4)
};
static uint32_t BCMI_EAGLE_XGXS_CKRST_LN_AFE_RST_PWRDWN_CTL_CTLr_fields[] =
{
    /* AFE_RX_PWRDN_FRC:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(1, 0, 0),
    /* AFE_RX_PWRDN_FRC_VAL:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(2, 1, 1),
    /* AFE_RX_RESET_FRC:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(3, 2, 2),
    /* AFE_RX_RESET_FRC_VAL:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(4, 3, 3),
    /* AFE_TX_PWRDN_FRC:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(11, 4, 4),
    /* AFE_TX_PWRDN_FRC_VAL:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(12, 5, 5),
    /* AFE_TX_RESET_FRC:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(13, 6, 6),
    /* AFE_TX_RESET_FRC_VAL:7:7 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(14, 7, 7)
};
static uint32_t BCMI_EAGLE_XGXS_CKRST_LN_CLK_RST_N_PWRDWN_CTLr_fields[] =
{
    /* LN_DP_S_RSTB:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(424, 1, 1),
    /* LN_RX_S_PWRDN:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(429, 2, 2),
    /* LN_TX_S_PWRDN:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(433, 3, 3),
    /* AFE_SIGDET_PWRDN:4:4 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(5, 4, 4)
};
static uint32_t BCMI_EAGLE_XGXS_CKRST_LN_DBG_RST_CTLr_fields[] =
{
    /* LN_RX_S_RSTB:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(430, 0, 0),
    /* LN_RX_DP_S_RSTB:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(425, 1, 1),
    /* SIGDET_DP_RSTB_EN:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(651, 2, 2),
    /* LN_TX_S_RSTB:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(434, 8, 8),
    /* LN_TX_DP_S_RSTB:9:9 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(432, 9, 9)
};
static uint32_t BCMI_EAGLE_XGXS_CKRST_LN_DP_RST_ST_STSr_fields[] =
{
    /* LANE_DP_RESET_STATE:0:2 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(419, 2, 0)
};
static uint32_t BCMI_EAGLE_XGXS_CKRST_LN_MCST_MASK_CTLr_fields[] =
{
    /* LANE_MULTICAST_MASK_CONTROL:0:0 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(420, 0, 0)
};
static uint32_t BCMI_EAGLE_XGXS_CKRST_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields[] =
{
    /* PMD_LN_H_RSTB_PKILL:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(569, 0, 0),
    /* PMD_LN_DP_H_RSTB_PKILL:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(568, 1, 1),
    /* PMD_LN_RX_H_PWRDN_PKILL:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(570, 2, 2),
    /* PMD_LN_TX_H_PWRDN_PKILL:3:3 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(571, 3, 3)
};
static uint32_t BCMI_EAGLE_XGXS_CKRST_LN_RST_OCC_CTLr_fields[] =
{
    /* LANE_REG_RESET_OCCURRED:0:0 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(421, 0, 0)
};
static uint32_t BCMI_EAGLE_XGXS_CKRST_LN_S_RSTB_CTLr_fields[] =
{
    /* LN_S_RSTB:0:0 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(431, 0, 0)
};
static uint32_t BCMI_EAGLE_XGXS_CKRST_OSR_MODE_CTLr_fields[] =
{
    /* OSR_MODE_FRC_VAL:0:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(513, 3, 0),
    /* OSR_MODE_FRC:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(512, 15, 15)
};
static uint32_t BCMI_EAGLE_XGXS_CKRST_OSR_MODE_PIN_STSr_fields[] =
{
    /* OSR_MODE_PIN:0:3 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(514, 3, 0)
};
static uint32_t BCMI_EAGLE_XGXS_CKRST_OSR_MODE_STSr_fields[] =
{
    /* OSR_MODE:0:3 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(511, 3, 0)
};
static uint32_t BCMI_EAGLE_XGXS_CKRST_PMD_LN_MODE_STSr_fields[] =
{
    /* PMD_LANE_MODE:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(567, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_CKRST_UC_ACK_LN_CTLr_fields[] =
{
    /* UC_ACK_LANE_CFG_DONE:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(768, 0, 0),
    /* UC_ACK_LANE_DP_RESET:1:1 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(769, 1, 1)
};
static uint32_t BCMI_EAGLE_XGXS_CL72_RXBASE_R_LD_STS_REPr_fields[] =
{
    /* CL72_IEEE_LP_STATUS_REPORT:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(241, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_CL72_RXCL72_LP_CTL_PAGEr_fields[] =
{
    /* CL72_LP_CONTROL_PAGE:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(252, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_CL72_RXCL72_STS1r_fields[] =
{
    /* CL72_SIGNAL_DETECT:0:0 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(259, 0, 0)
};
static uint32_t BCMI_EAGLE_XGXS_CL72_RXDBG2r_fields[] =
{
    /* CL72_GOOD_MARKER_CNT:0:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(236, 1, 0),
    /* CL72_BAD_MARKER_CNT:2:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(227, 4, 2),
    /* CL72_DME_CELL_BOUNDARY_CHK:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(232, 7, 7),
    /* CL72_CTRL_FRAME_DLY:8:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(229, 11, 8),
    /* CL72_STRICT_DME_CHK:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(261, 12, 12),
    /* CL72_STRICT_MARKER_CHK:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(262, 13, 13),
    /* CL72_PPM_OFFSET_EN:14:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(254, 14, 14)
};
static uint32_t BCMI_EAGLE_XGXS_CL72_RXMISC1_CTLr_fields[] =
{
    /* CL72_TR_COARSE_LOCK:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(265, 1, 1),
    /* CL72_RX_DP_LN_CLK_EN:2:2 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(257, 2, 2)
};
static uint32_t BCMI_EAGLE_XGXS_CL72_RXRCVD_STSr_fields[] =
{
    /* CL72_RCVD_STATUS_PAGE:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(255, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_CL72_TXBASE_R_LD_COEFF_UPDr_fields[] =
{
    /* CL72_IEEE_LD_COEFF_UPDATE:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(238, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_CL72_TXBASE_R_LD_STS_REPr_fields[] =
{
    /* CL72_IEEE_LD_STATUS_REPORT:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(239, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_CL72_TXBASE_R_LP_COEFF_UPDr_fields[] =
{
    /* CL72_IEEE_LP_COEFF_UPDATE:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(240, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_CL72_TXBASE_R_PMD_CTLr_fields[] =
{
    /* CL72_IEEE_RESTART_TRAINING:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(243, 0, 0),
    /* CL72_IEEE_TRAINING_ENABLE:1:1 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(244, 1, 1)
};
static uint32_t BCMI_EAGLE_XGXS_CL72_TXBASE_R_PMD_STSr_fields[] =
{
    /* CL72_IEEE_RECEIVER_STATUS:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(242, 0, 0),
    /* CL72_IEEE_FRAME_LOCK:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(237, 1, 1),
    /* CL72_IEEE_TRAINING_STATUS:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(246, 2, 2),
    /* CL72_IEEE_TRAINING_FAILURE:3:3 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(245, 3, 3)
};
static uint32_t BCMI_EAGLE_XGXS_CL72_TXCL72_LD_STS_PAGEr_fields[] =
{
    /* CL72_LD_STATUS_PAGE:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(249, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_CL72_TXCL72_LD_XMT_STS_PAGE_OVRRr_fields[] =
{
    /* CL72_OVERRIDE_LD_STATUS_PAGE:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(253, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_CL72_TXCL72_READY_FOR_CMDr_fields[] =
{
    /* CL72_READY_FOR_CMD:0:0 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(256, 0, 0)
};
static uint32_t BCMI_EAGLE_XGXS_CL72_TXCL72_TX_DBG_STSr_fields[] =
{
    /* CL72_LD_COEFF_CMD_HIST:0:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(248, 10, 0),
    /* CL72_FRAME_LOCK_LH:11:11 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(234, 11, 11)
};
static uint32_t BCMI_EAGLE_XGXS_CL72_TXC_DBG1r_fields[] =
{
    /* MAIN_TAP_MIN_VAL:0:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(441, 6, 0),
    /* TAP_SUM_MAX_VAL:7:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(664, 14, 7)
};
static uint32_t BCMI_EAGLE_XGXS_CL72_TXC_MAX_WAIT_TMRr_fields[] =
{
    /* MAX_WAIT_TIMER_PERIOD:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(442, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_CL72_TXC_TAP_LIMIT_CTL1r_fields[] =
{
    /* PRE_TAP_LIMIT:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(602, 4, 0),
    /* POST_TAP_LIMIT:5:10 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(580, 10, 5)
};
static uint32_t BCMI_EAGLE_XGXS_CL72_TXC_TAP_LIMIT_CTL2r_fields[] =
{
    /* MAIN_TAP_LIMIT:0:6 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(440, 6, 0)
};
static uint32_t BCMI_EAGLE_XGXS_CL72_TXC_TAP_PRESET_CTLr_fields[] =
{
    /* POST_TAP_PRESET_VAL:0:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(581, 5, 0),
    /* PRE_TAP_PRESET_VAL:6:10 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(603, 10, 6)
};
static uint32_t BCMI_EAGLE_XGXS_CL72_TXC_WAIT_TMRr_fields[] =
{
    /* WAIT_CNTR_LIMIT:0:8 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(797, 8, 0)
};
static uint32_t BCMI_EAGLE_XGXS_CL72_TXDBG3r_fields[] =
{
    /* CL72_BRK_RING_OSC:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(228, 0, 0),
    /* CL72_FRAME_LOCK_RDY_FOR_CMD_EN:1:1 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(235, 1, 1)
};
static uint32_t BCMI_EAGLE_XGXS_CL72_TXKR_DFLT_CTL1r_fields[] =
{
    /* CL72_TX_FIR_TAP_PRE_KR_INIT_VAL:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(269, 4, 0),
    /* CL72_TX_FIR_TAP_POST_KR_INIT_VAL:5:10 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(268, 10, 5)
};
static uint32_t BCMI_EAGLE_XGXS_CL72_TXKR_DFLT_CTL2r_fields[] =
{
    /* CL72_TX_FIR_TAP_MAIN_KR_INIT_VAL:0:6 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(267, 6, 0)
};
static uint32_t BCMI_EAGLE_XGXS_CL72_TXMISC2_CTLr_fields[] =
{
    /* CL72_RX_TRAINED:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(258, 0, 0),
    /* CL72_SIGNAL_DET_FRC:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(260, 1, 1),
    /* CL72_TX_DP_LN_CLK_EN:2:2 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(266, 2, 2)
};
static uint32_t BCMI_EAGLE_XGXS_CL72_TXMISC_COEFF_CTLr_fields[] =
{
    /* CL72_INC_DEC_VAL_SEL:0:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(247, 1, 0),
    /* CL72_TAP_V2_VAL:2:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(263, 7, 2),
    /* CL72_V2_CONSTRAINT_DIS:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(270, 8, 8),
    /* CL72_LD_XMT_STATUS_LOAD:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(250, 9, 9),
    /* CL72_LD_XMT_STATUS_OVERRIDE:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(251, 10, 10),
    /* CL72_DIS_LP_COEFF_UPDATES_TO_LD:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(230, 11, 11),
    /* CL72_DOUBLE_CMD_EN:12:12 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(233, 12, 12)
};
static uint32_t BCMI_EAGLE_XGXS_CL72_TXPCS_INTERFACE_CTLr_fields[] =
{
    /* CL72_DIS_MAX_WAIT_TIMER:0:0 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(231, 0, 0)
};
static uint32_t BCMI_EAGLE_XGXS_CL72_TXXMT_UPDr_fields[] =
{
    /* CL72_XMT_UPDATE_PAGE:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(271, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_DIG_CORE_DP_RST_ST_STSr_fields[] =
{
    /* CORE_DP_RESET_STATE:0:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(280, 2, 0),
    /* LANE_RESET_RELEASED_INDEX:8:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(423, 12, 8),
    /* LANE_RESET_RELEASED:14:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(422, 14, 14)
};
static uint32_t BCMI_EAGLE_XGXS_DIG_CORE_MCST_MASK_CTLr_fields[] =
{
    /* CORE_MULTICAST_MASK_CONTROL:0:3 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(282, 3, 0)
};
static uint32_t BCMI_EAGLE_XGXS_DIG_CORE_RST_OCC_CTLr_fields[] =
{
    /* CORE_REG_RESET_OCCURRED:0:0 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(283, 0, 0)
};
static uint32_t BCMI_EAGLE_XGXS_DIG_LN_ADDR_2_3r_fields[] =
{
    /* LANE_ADDR_2:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(417, 4, 0),
    /* LANE_ADDR_3:8:12 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(418, 12, 8)
};
static uint32_t BCMI_EAGLE_XGXS_DIG_PMD_CORE_MODE_STSr_fields[] =
{
    /* PMD_CORE_MODE:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(566, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_DIG_REVID0r_fields[] =
{
    /* REVID_MODEL:0:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(622, 5, 0),
    /* REVID_PROCESS:6:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(625, 8, 6),
    /* REVID_BONDING:9:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(616, 10, 9),
    /* REVID_REV_NUMBER:11:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(627, 13, 11),
    /* REVID_REV_LETTER:14:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(626, 15, 14)
};
static uint32_t BCMI_EAGLE_XGXS_DIG_REVID1r_fields[] =
{
    /* REVID_EEE:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(618, 0, 0),
    /* REVID_LLP:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(619, 1, 1),
    /* REVID_PIR:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(624, 2, 2),
    /* REVID_CL72:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(617, 3, 3),
    /* REVID_MICRO:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(621, 4, 4),
    /* REVID_MDIO:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(620, 5, 5),
    /* REVID_MULTIPLICITY:12:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(623, 15, 12)
};
static uint32_t BCMI_EAGLE_XGXS_DIG_REVID2r_fields[] =
{
    /* REVID2:0:3 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(615, 3, 0)
};
static uint32_t BCMI_EAGLE_XGXS_DIG_RST_CTL_CORE_DPr_fields[] =
{
    /* PMD_CORE_DP_H_RSTB_PKILL:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(565, 1, 1),
    /* SUP_RST_SEQ_FRC_VAL:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(663, 3, 3),
    /* SUP_RST_SEQ_FRC:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(662, 4, 4),
    /* PMD_MDIO_TRANS_PKILL:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(572, 5, 5),
    /* PMD_TX_CLK_VLD_FRC:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(577, 7, 7),
    /* PMD_TX_CLK_VLD_FRC_VAL:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(578, 8, 8),
    /* TX_S_COMCLK_SEL:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(761, 9, 9),
    /* TX_S_COMCLK_FRC_ON:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(760, 10, 10),
    /* TX_S_CLKGATE_FRC_ON:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(759, 11, 11),
    /* AFE_S_PLL_RESET_FRC_VAL:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(10, 12, 12),
    /* AFE_S_PLL_RESET_FRC:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(9, 13, 13),
    /* TX_PI_LOOP_FILTER_STABLE:14:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(743, 14, 14)
};
static uint32_t BCMI_EAGLE_XGXS_DIG_RST_CTL_PMDr_fields[] =
{
    /* CORE_S_RSTB:0:0 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(284, 0, 0)
};
static uint32_t BCMI_EAGLE_XGXS_DIG_RST_SEQ_TMR_CTLr_fields[] =
{
    /* RST_SEQ_TIMER:0:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(634, 2, 0),
    /* PWRDN_SEQ_TIMER:8:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(604, 10, 8),
    /* RST_SEQ_DIS_FLT_MODE:14:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(633, 15, 14)
};
static uint32_t BCMI_EAGLE_XGXS_DIG_TOP_USER_CTL0r_fields[] =
{
    /* HEARTBEAT_COUNT_1US:0:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(408, 9, 0),
    /* CORE_DP_S_RSTB:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(281, 13, 13),
    /* AFE_S_PLL_PWRDN:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(8, 14, 14),
    /* UC_ACTIVE:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(770, 15, 15)
};
static uint32_t BCMI_EAGLE_XGXS_DIG_TX_LN_MAP_0_1_2r_fields[] =
{
    /* TX_LANE_MAP_0:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(719, 4, 0),
    /* TX_LANE_MAP_1:5:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(720, 9, 5),
    /* TX_LANE_MAP_2:10:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(721, 14, 10)
};
static uint32_t BCMI_EAGLE_XGXS_DIG_TX_LN_MAP_3_N_LN_ADDR_0_1r_fields[] =
{
    /* TX_LANE_MAP_3:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(722, 4, 0),
    /* LANE_ADDR_0:5:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(415, 9, 5),
    /* LANE_ADDR_1:10:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(416, 14, 10)
};
static uint32_t BCMI_EAGLE_XGXS_DIG_UC_ACK_CORE_CTLr_fields[] =
{
    /* UC_ACK_CORE_CFG_DONE:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(762, 0, 0),
    /* UC_ACK_CORE_DP_RESET:1:1 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(763, 1, 1)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_CDR_CTL0r_fields[] =
{
    /* CDR_PHASE_SAT_CTRL:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(223, 0, 0),
    /* BR_PD_EN:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(191, 1, 1),
    /* CDR_FREQ_EN:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(211, 2, 2),
    /* CDR_INTEG_REG_CLR:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(217, 4, 4),
    /* CDR_PHASE_ERR_FRZ:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(222, 5, 5),
    /* CDR_INTEG_SAT_SEL:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(218, 6, 6),
    /* CDR_FREQ_OVERRIDE_EN:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(212, 7, 7),
    /* CDR_LM_THR_SEL:8:10 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(220, 10, 8)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_CDR_CTL1r_fields[] =
{
    /* CDR_FREQ_OVERRIDE_VAL:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(213, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_CDR_CTL2r_fields[] =
{
    /* CDR_ZERO_POLARITY:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(226, 0, 0),
    /* PHASE_ERR_OFFSET_MULT_2:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(547, 1, 1),
    /* PATTERN_SEL:4:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(522, 7, 4),
    /* OSX2P_PHERR_GAIN:8:9 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(515, 9, 8)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_CDR_STS_INTEGr_fields[] =
{
    /* CDR_INTEG_REG:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(216, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_CDR_STS_PHASE_ERRr_fields[] =
{
    /* CDR_PHASE_ERR:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(221, 4, 0),
    /* CDR_LM_OUTOFLOCK:8:8 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(219, 8, 8)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_CTLr_fields[] =
{
    /* PD_CH_P1:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(541, 0, 0),
    /* OFFSET_PD:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(510, 1, 1),
    /* EN_HGAIN:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(395, 2, 2),
    /* P1_THRESH_SEL:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(521, 3, 3),
    /* M1_THRESH_ZERO:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(439, 4, 4),
    /* M1_THRESH_SEL:5:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(438, 6, 5),
    /* PF_HIZ:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(544, 7, 7),
    /* EN_DFE_CLK:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(394, 8, 8),
    /* OFFSET_FASTACQ:9:9 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(509, 9, 9)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_DC_OFFSr_fields[] =
{
    /* DC_OFFSET:0:6 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(291, 6, 0)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_DFE_1_CTLr_fields[] =
{
    /* DFE_1_ACC_CLR:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(292, 0, 0),
    /* DFE_1_CMN_ONLY:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(294, 1, 1),
    /* DFE_1_INV_P1:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(301, 8, 8),
    /* DFE_1_INV_M1:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(300, 9, 9),
    /* DFE_1_ERR_GAIN:10:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(297, 11, 10),
    /* DFE_1_GRADIENT_INVERT:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(299, 12, 12),
    /* DFE_1_ERR_SEL:13:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(298, 14, 13),
    /* DFE_1_EN:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(296, 15, 15)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_DFE_1_PAT_CTLr_fields[] =
{
    /* DFE_1_PATTERN:0:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(303, 5, 0),
    /* DFE_1_PATTERN_BIT_EN:8:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(304, 13, 8)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_DFE_1_STSr_fields[] =
{
    /* DFE_1_CMN:0:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(293, 5, 0),
    /* DFE_1_O:8:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(302, 10, 8),
    /* DFE_1_E:11:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(295, 13, 11),
    /* DFE_1_WANTS_NEGATIVE:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(305, 15, 15)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_DFE_2_CTLr_fields[] =
{
    /* DFE_2_ACC_CLR:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(306, 0, 0),
    /* DFE_2_CMN_ONLY:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(308, 1, 1),
    /* DFE_2_INV_P1:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(315, 8, 8),
    /* DFE_2_INV_M1:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(314, 9, 9),
    /* DFE_2_ERR_GAIN:10:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(311, 11, 10),
    /* DFE_2_GRADIENT_INVERT:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(313, 12, 12),
    /* DFE_2_ERR_SEL:13:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(312, 14, 13),
    /* DFE_2_EN:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(310, 15, 15)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_DFE_2_PAT_CTLr_fields[] =
{
    /* DFE_2_PATTERN:0:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(317, 5, 0),
    /* DFE_2_PATTERN_BIT_EN:8:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(318, 13, 8)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_DFE_2_STSr_fields[] =
{
    /* DFE_2_CMN:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(307, 4, 0),
    /* DFE_2_SO:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(320, 5, 5),
    /* DFE_2_SE:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(319, 6, 6),
    /* DFE_2_O:8:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(316, 10, 8),
    /* DFE_2_E:11:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(309, 13, 11)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_DFE_3_4_5_STSr_fields[] =
{
    /* DFE_3_CMN:0:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(322, 5, 0),
    /* DFE_4_CMN:6:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(332, 10, 6),
    /* DFE_5_CMN:11:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(342, 15, 11)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_DFE_3_CTLr_fields[] =
{
    /* DFE_3_ACC_CLR:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(321, 0, 0),
    /* DFE_3_INV_P1:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(328, 8, 8),
    /* DFE_3_INV_M1:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(327, 9, 9),
    /* DFE_3_ERR_GAIN:10:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(324, 11, 10),
    /* DFE_3_GRADIENT_INVERT:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(326, 12, 12),
    /* DFE_3_ERR_SEL:13:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(325, 14, 13),
    /* DFE_3_EN:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(323, 15, 15)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_DFE_3_PAT_CTLr_fields[] =
{
    /* DFE_3_PATTERN:0:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(329, 5, 0),
    /* DFE_3_PATTERN_BIT_EN:8:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(330, 13, 8)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_DFE_4_CTLr_fields[] =
{
    /* DFE_4_ACC_CLR:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(331, 0, 0),
    /* DFE_4_INV_P1:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(338, 8, 8),
    /* DFE_4_INV_M1:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(337, 9, 9),
    /* DFE_4_ERR_GAIN:10:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(334, 11, 10),
    /* DFE_4_GRADIENT_INVERT:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(336, 12, 12),
    /* DFE_4_ERR_SEL:13:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(335, 14, 13),
    /* DFE_4_EN:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(333, 15, 15)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_DFE_4_PAT_CTLr_fields[] =
{
    /* DFE_4_PATTERN:0:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(339, 5, 0),
    /* DFE_4_PATTERN_BIT_EN:8:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(340, 13, 8)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_DFE_5_CTLr_fields[] =
{
    /* DFE_5_ACC_CLR:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(341, 0, 0),
    /* DFE_5_INV_P1:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(348, 8, 8),
    /* DFE_5_INV_M1:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(347, 9, 9),
    /* DFE_5_ERR_GAIN:10:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(344, 11, 10),
    /* DFE_5_GRADIENT_INVERT:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(346, 12, 12),
    /* DFE_5_ERR_SEL:13:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(345, 14, 13),
    /* DFE_5_EN:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(343, 15, 15)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_DFE_5_PAT_CTLr_fields[] =
{
    /* DFE_5_PATTERN:0:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(349, 5, 0),
    /* DFE_5_PATTERN_BIT_EN:8:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(350, 13, 8)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_DFE_COMMON_CTLr_fields[] =
{
    /* DFE_UPDATE_GAIN:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(359, 13, 13),
    /* DFE_ALLOW_SIMULT:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(352, 14, 14),
    /* DFE_ACC_HYS_EN:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(351, 15, 15)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_DFE_VGA_OVRRr_fields[] =
{
    /* DFE_VGA_WRITE_VAL:0:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(362, 8, 0),
    /* DFE_VGA_WRITE_TAPSEL:9:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(361, 13, 9),
    /* DFE_VGA_WRITE_EN:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(360, 15, 15)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_OFFS_ADJ_DATA_EVENr_fields[] =
{
    /* DFE_OFFSET_ADJ_DATA_EVEN:0:5 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(353, 5, 0)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_OFFS_ADJ_DATA_ODDr_fields[] =
{
    /* DFE_OFFSET_ADJ_DATA_ODD:0:5 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(354, 5, 0)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_OFFS_ADJ_M1_EVENr_fields[] =
{
    /* DFE_OFFSET_ADJ_M1_EVEN:0:5 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(355, 5, 0)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_OFFS_ADJ_M1_ODDr_fields[] =
{
    /* DFE_OFFSET_ADJ_M1_ODD:0:5 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(356, 5, 0)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_OFFS_ADJ_P1_EVENr_fields[] =
{
    /* DFE_OFFSET_ADJ_P1_EVEN:0:5 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(357, 5, 0)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_OFFS_ADJ_P1_ODDr_fields[] =
{
    /* DFE_OFFSET_ADJ_P1_ODD:0:5 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(358, 5, 0)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_P1_FRAC_OFFS_CTLr_fields[] =
{
    /* P1_OFFSET:0:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(518, 6, 0),
    /* P1_OFFSET_EN:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(519, 7, 7),
    /* P1_OFF_3LEVELQ_EN:8:8 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(520, 8, 8)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_PF2_LOWP_CTLr_fields[] =
{
    /* PF2_LOWP_CTRL:0:2 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(542, 2, 0)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_PF_CTLr_fields[] =
{
    /* PF_CTRL:0:3 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(543, 3, 0)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_RX_PI_CNT_BIN_Dr_fields[] =
{
    /* CNT_BIN_D_DREG:0:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(272, 6, 0),
    /* CNT_BIN_P1_DREG:8:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(276, 14, 8)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_RX_PI_CNT_BIN_Mr_fields[] =
{
    /* CNT_BIN_M1_MREG:0:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(274, 6, 0),
    /* CNT_BIN_D_MREG:8:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(273, 14, 8)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_RX_PI_CNT_BIN_Pr_fields[] =
{
    /* CNT_BIN_P1_PREG:0:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(277, 6, 0),
    /* CNT_BIN_M1_PREG:8:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(275, 14, 8)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_RX_PI_CTLr_fields[] =
{
    /* RX_PI_PHASE_STEP_CNT:0:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(642, 6, 0),
    /* RX_PI_MANUAL_STROBE:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(641, 9, 9),
    /* RX_PI_PHASE_STEP_DIR:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(643, 10, 10),
    /* RX_PI_MANUAL_MODE:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(639, 11, 11),
    /* RX_PI_SLICERS_EN:12:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(644, 14, 12),
    /* RX_PI_MANUAL_RESET:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(640, 15, 15)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_RX_PI_DIFF_BINr_fields[] =
{
    /* CNT_D_MINUS_M1:0:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(278, 7, 0),
    /* CNT_D_MINUS_P1:8:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(279, 15, 8)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_SCRATCHr_fields[] =
{
    /* UC_DSC_SCRATCH:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(774, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_SM_CTL0r_fields[] =
{
    /* EEE_MODE_EN:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(384, 1, 1),
    /* EEE_QUIET_RX_AFE_PWRDWN_VAL:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(388, 2, 2),
    /* IGNORE_RX_MODE:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(414, 3, 3),
    /* CL72_TIMER_EN:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(264, 4, 4),
    /* UC_TUNE_EN:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(777, 5, 5),
    /* HW_TUNE_EN:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(411, 6, 6),
    /* UC_TRNSUM_EN:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(776, 7, 7),
    /* EEE_MEASURE_EN:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(383, 8, 8),
    /* UC_ACK_DSC_EEE_DONE:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(765, 11, 11),
    /* UC_ACK_DSC_RESET:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(766, 12, 12),
    /* UC_ACK_DSC_RESTART:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(767, 13, 13),
    /* UC_ACK_DSC_CONFIG:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(764, 14, 14),
    /* SET_MEAS_INCOMPLETE:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(650, 15, 15)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_SM_CTL1r_fields[] =
{
    /* RX_DSC_LOCK_FRC:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(637, 0, 0),
    /* RX_DSC_LOCK_FRC_VAL:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(638, 1, 1),
    /* DSC_CLR_FRC:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(369, 2, 2),
    /* DSC_CLR_FRC_VAL:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(370, 3, 3),
    /* TRNSUM_FRZ_FRC:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(679, 4, 4),
    /* TRNSUM_FRZ_FRC_VAL:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(680, 5, 5),
    /* TIMER_DONE_FRC:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(669, 6, 6),
    /* TIMER_DONE_FRC_VAL:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(670, 7, 7),
    /* FREQ_UPD_EN_FRC:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(406, 8, 8),
    /* FREQ_UPD_EN_FRC_VAL:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(407, 9, 9),
    /* CDR_FRZ_FRC:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(214, 10, 10),
    /* CDR_FRZ_FRC_VAL:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(215, 11, 11),
    /* TRNSUM_CLR_FRC:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(671, 12, 12),
    /* TRNSUM_CLR_FRC_VAL:13:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(672, 13, 13)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_SM_CTL2r_fields[] =
{
    /* EEE_LFSR_CNT:0:12 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(381, 12, 0)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_SM_CTL3r_fields[] =
{
    /* MEASURE_LFSR_CNT:0:12 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(458, 12, 0)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_SM_CTL4r_fields[] =
{
    /* ACQ_CDR_TIMEOUT:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(0, 4, 0),
    /* CDR_SETTLE_TIMEOUT:5:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(225, 9, 5),
    /* HW_TUNE_TIMEOUT:10:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(412, 14, 10)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_SM_CTL5r_fields[] =
{
    /* MEASURE_TIMEOUT:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(459, 4, 0),
    /* EEE_ACQ_CDR_TIMEOUT:5:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(377, 9, 5),
    /* EEE_CDR_SETTLE_TIMEOUT:10:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(379, 14, 10)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_SM_CTL6r_fields[] =
{
    /* EEE_HW_TUNE_TIMEOUT:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(380, 4, 0),
    /* EEE_ANA_PWR_TIMEOUT:10:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(378, 14, 10)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_SM_CTL7r_fields[] =
{
    /* CDR_BWSEL_INTEG_ACQCDR:0:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(205, 3, 0),
    /* CDR_BWSEL_INTEG_EEE_ACQCDR:4:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(206, 7, 4),
    /* CDR_BWSEL_INTEG_NORM:8:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(207, 11, 8),
    /* CDR_BWSEL_PROP_ACQCDR:12:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(208, 13, 12),
    /* CDR_BWSEL_PROP_NORM:14:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(210, 15, 14)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_SM_CTL8r_fields[] =
{
    /* PHASE_ERR_OFFSET:0:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(545, 3, 0),
    /* EEE_PHASE_ERR_OFFSET:4:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(385, 7, 4),
    /* PHASE_ERR_OFFSET_EN:8:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(546, 9, 8),
    /* EEE_PHASE_ERR_OFFSET_EN:10:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(386, 11, 10),
    /* CDR_BWSEL_PROP_EEE_ACQCDR:14:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(209, 15, 14)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_SM_CTL9r_fields[] =
{
    /* RX_RESTART_PMD:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(646, 0, 0),
    /* RX_RESTART_PMD_HOLD:1:1 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(647, 1, 1)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_SM_STS_DSC_LOCKr_fields[] =
{
    /* RX_DSC_LOCK:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(636, 0, 0),
    /* MEAS_INCOMPLETE:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(460, 1, 1),
    /* EEE_MEASURE_CNT:7:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(382, 15, 7)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_SM_STS_DSC_STr_fields[] =
{
    /* DSC_SM_SCRATCH:0:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(373, 3, 0),
    /* DSC_SM_READY_FOR_CMD:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(372, 4, 4),
    /* DSC_SM_GP_UC_REQ:5:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(371, 10, 5),
    /* DSC_STATE:11:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(374, 15, 11)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_SM_STS_DSC_ST_EEE_ONE_HOTr_fields[] =
{
    /* DSC_STATE_EEE_ONE_HOT:0:6 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(375, 6, 0)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_SM_STS_DSC_ST_ONE_HOTr_fields[] =
{
    /* DSC_STATE_ONE_HOT:0:9 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(376, 9, 0)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_SM_STS_RESTARTr_fields[] =
{
    /* RESTART_PI_EXT_MODE:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(610, 0, 0),
    /* RESTART_SIGDET:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(612, 1, 1),
    /* RESTART_PMD_RESTART:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(611, 2, 2),
    /* EEE_QUIET_FROM_EEE_STATES:3:3 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(387, 3, 3)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_TRNSUM_CTL1r_fields[] =
{
    /* TRNSUM_TAP_RANGE_SEL:2:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(692, 3, 2),
    /* CDR_QPHASE_MULT_EN:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(224, 4, 4),
    /* TRNSUM_EYE_CLOSURE_EN:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(676, 5, 5),
    /* TRNSUM_GAIN:6:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(681, 7, 6),
    /* TRNSUM_PATTERN_FULL_CHECK_OFF:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(689, 9, 9),
    /* TRNSUM_INV_PATTERN_EN:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(683, 10, 10),
    /* TRNSUM_RANDOM_TAPSEL_DISABLE:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(690, 11, 11),
    /* TRNSUM_ERR_SEL:12:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(675, 14, 12),
    /* TRNSUM_EN:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(673, 15, 15)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_TRNSUM_CTL2r_fields[] =
{
    /* TRNSUM_PATTERN_BIT_EN:0:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(688, 7, 0),
    /* TRNSUM_PATTERN:8:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(687, 15, 8)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_TRNSUM_CTL3r_fields[] =
{
    /* TRNSUM_TAP_SIGN:0:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(693, 7, 0),
    /* TRNSUM_TAP_EN:8:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(691, 15, 8)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_TRNSUM_CTL4r_fields[] =
{
    /* TRNSUM_UNSIGNED_CORR:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(694, 0, 0),
    /* TRNSUM_UNSIGNED_FLIP:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(695, 1, 1),
    /* TDR_BIT_SEL:2:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(665, 6, 2),
    /* TDR_TRNSUM_EN:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(668, 7, 7),
    /* TDR_CYCLE_SEL:8:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(667, 11, 8),
    /* TDR_CYCLE_BIN:12:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(666, 15, 12)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_TRNSUM_CTL5r_fields[] =
{
    /* SEND_LMS_TO_PCS:14:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(649, 14, 14)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_TRNSUM_STS1r_fields[] =
{
    /* TRNSUM_E_HIGH:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(677, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_TRNSUM_STS2r_fields[] =
{
    /* TRNSUM_E_LOW:0:7 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(678, 7, 0)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_TRNSUM_STS3r_fields[] =
{
    /* TRNSUM_O_HIGH:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(685, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_TRNSUM_STS4r_fields[] =
{
    /* TRNSUM_O_LOW:0:7 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(686, 7, 0)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_TRNSUM_STS5r_fields[] =
{
    /* TRNSUM_HIGH:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(682, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_TRNSUM_STS6r_fields[] =
{
    /* TRNSUM_LOW:0:9 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(684, 9, 0)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_UC_CTLr_fields[] =
{
    /* UC_DSC_GP_UC_REQ:0:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(772, 5, 0),
    /* UC_DSC_ERROR_FOUND:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(771, 6, 6),
    /* UC_DSC_READY_FOR_CMD:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(773, 7, 7),
    /* UC_DSC_SUPP_INFO:8:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(775, 15, 8)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_VGA_CTLr_fields[] =
{
    /* VGA_P1_ACC_CLR:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(791, 0, 0),
    /* VGA_ACC_HYS_EN:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(783, 1, 1),
    /* VGA_TABLEMAP_DISABLE:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(795, 2, 2),
    /* VGA_UPDATE_GAIN:6:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(796, 7, 6),
    /* VGA_INV_P1:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(790, 8, 8),
    /* VGA_INV_M1:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(789, 9, 9),
    /* VGA_ERR_GAIN:10:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(787, 11, 10),
    /* VGA_P1_GRADIENT_INVERT:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(792, 12, 12),
    /* VGA_ERR_SEL:13:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(788, 14, 13),
    /* VGA_EN:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(786, 15, 15)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_VGA_P1EYEDIAG_STSr_fields[] =
{
    /* VGA_BIN:0:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(784, 5, 0),
    /* P1_EYEDIAG_BIN:8:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(516, 13, 8)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_VGA_PAT_EYEDIAG_CTLr_fields[] =
{
    /* VGA_PATTERN:0:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(793, 3, 0),
    /* VGA_PATTERN_BIT_EN:4:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(794, 7, 4),
    /* P1_EYEDIAG_EN:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(517, 15, 15)
};
static uint32_t BCMI_EAGLE_XGXS_DSC_VGA_TAP_BINr_fields[] =
{
    /* VGA_CTRL_BIN:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(785, 4, 0),
    /* VGA3_CTRL_BIN:8:11 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(782, 11, 8)
};
static uint32_t BCMI_EAGLE_XGXS_MDIO_AERr_fields[] =
{
    /* MDIO_AER:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(444, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_MDIO_BCST_PORT_ADDRr_fields[] =
{
    /* MDIO_BRCST_PORT_ADDR:0:4 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(446, 4, 0)
};
static uint32_t BCMI_EAGLE_XGXS_MDIO_BLK_ADDRr_fields[] =
{
    /* MDIO_BLK_ADDR:4:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(445, 14, 4)
};
static uint32_t BCMI_EAGLE_XGXS_MDIO_MASKDATAr_fields[] =
{
    /* MDIO_MASKDATA:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(455, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_MDIO_MMD_SELr_fields[] =
{
    /* MDIO_DEV_CL22_EN:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(449, 0, 0),
    /* MDIO_DEV_PMD_EN:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(453, 2, 2),
    /* MDIO_DEV_AN_EN:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(448, 3, 3),
    /* MDIO_DEV_PHY_EN:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(452, 4, 4),
    /* MDIO_DEV_DTE_EN:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(450, 5, 5),
    /* MDIO_DEV_PCS_EN:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(451, 6, 6),
    /* MDIO_MULTI_MMDS_EN:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(456, 14, 14),
    /* MDIO_MULTI_PRTS_EN:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(457, 15, 15)
};
static uint32_t BCMI_EAGLE_XGXS_PATGEN_SEQ0r_fields[] =
{
    /* PATT_GEN_SEQ_0:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(524, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_PATGEN_SEQ1r_fields[] =
{
    /* PATT_GEN_SEQ_1:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(525, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_PATGEN_SEQ2r_fields[] =
{
    /* PATT_GEN_SEQ_2:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(531, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_PATGEN_SEQ3r_fields[] =
{
    /* PATT_GEN_SEQ_3:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(532, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_PATGEN_SEQ4r_fields[] =
{
    /* PATT_GEN_SEQ_4:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(533, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_PATGEN_SEQ5r_fields[] =
{
    /* PATT_GEN_SEQ_5:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(534, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_PATGEN_SEQ6r_fields[] =
{
    /* PATT_GEN_SEQ_6:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(535, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_PATGEN_SEQ7r_fields[] =
{
    /* PATT_GEN_SEQ_7:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(536, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_PATGEN_SEQ8r_fields[] =
{
    /* PATT_GEN_SEQ_8:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(537, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_PATGEN_SEQ9r_fields[] =
{
    /* PATT_GEN_SEQ_9:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(538, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_PATGEN_SEQ_10r_fields[] =
{
    /* PATT_GEN_SEQ_10:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(526, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_PATGEN_SEQ_11r_fields[] =
{
    /* PATT_GEN_SEQ_11:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(527, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_PATGEN_SEQ_12r_fields[] =
{
    /* PATT_GEN_SEQ_12:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(528, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_PATGEN_SEQ_13r_fields[] =
{
    /* PATT_GEN_SEQ_13:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(529, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_PATGEN_SEQ_14r_fields[] =
{
    /* PATT_GEN_SEQ_14:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(530, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_PLL_CAL_CTL0r_fields[] =
{
    /* VCO_STEP_TIME:0:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(781, 7, 0),
    /* VCO_START_TIME:8:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(780, 15, 8)
};
static uint32_t BCMI_EAGLE_XGXS_PLL_CAL_CTL1r_fields[] =
{
    /* RETRY_TIME:0:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(614, 7, 0),
    /* PRE_FREQ_DET_TIME:8:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(601, 15, 8)
};
static uint32_t BCMI_EAGLE_XGXS_PLL_CAL_CTL2r_fields[] =
{
    /* WIN_CAL_CNTR:0:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(798, 7, 0),
    /* RES_CAL_CNTR:8:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(613, 15, 8)
};
static uint32_t BCMI_EAGLE_XGXS_PLL_CAL_CTL3r_fields[] =
{
    /* FAST_SEARCH_MODE:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(398, 0, 0),
    /* CAP_CNT_MASK_EN:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(192, 1, 1),
    /* CAP_SEQ_CYA:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(204, 2, 2),
    /* CAP_RESTART:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(199, 3, 3),
    /* CAP_RETRY_EN:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(200, 4, 4),
    /* CAP_FORCE_SLOWDOWN:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(195, 5, 5),
    /* CAP_FORCE_SLOWDOWN_EN:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(196, 6, 6),
    /* CAP_SELECT_M_EN:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(203, 7, 7),
    /* CAP_SELECT_M:8:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(202, 15, 8)
};
static uint32_t BCMI_EAGLE_XGXS_PLL_CAL_CTL4r_fields[] =
{
    /* PLL_LOCK_FRC_VAL:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(557, 0, 0),
    /* PLL_LOCK_FRC:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(556, 1, 1),
    /* PLL_FORCE_CAP_PASS:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(550, 2, 2),
    /* PLL_FORCE_CAP_PASS_EN:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(551, 3, 3),
    /* PLL_FORCE_CAP_DONE:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(548, 4, 4),
    /* PLL_FORCE_CAP_DONE_EN:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(549, 5, 5),
    /* PLL_FORCE_FPASS:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(554, 6, 6),
    /* PLL_FORCE_FDONE:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(552, 7, 7),
    /* PLL_FORCE_FDONE_EN:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(553, 8, 8),
    /* VCO_RST_EN:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(779, 9, 9),
    /* SLOWDN_XOR:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(661, 10, 10),
    /* FREQ_MONITOR_EN:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(403, 11, 11),
    /* FREQ_DET_RESTART_EN:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(399, 12, 12),
    /* FREQ_DET_RETRY_EN:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(400, 13, 13),
    /* VCO_DONE_EN:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(778, 14, 14),
    /* PLL_SEQ_START:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(564, 15, 15)
};
static uint32_t BCMI_EAGLE_XGXS_PLL_CAL_CTL5r_fields[] =
{
    /* REFCLK_DIVCNT:0:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(605, 13, 0)
};
static uint32_t BCMI_EAGLE_XGXS_PLL_CAL_CTL6r_fields[] =
{
    /* REFCLK_DIVCNT_SEL:0:2 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(606, 2, 0)
};
static uint32_t BCMI_EAGLE_XGXS_PLL_CAL_CTL7r_fields[] =
{
    /* PLL_MODE:0:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(559, 3, 0),
    /* RESCAL_FRC_VAL:4:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(608, 7, 4),
    /* RESCAL_FRC:8:8 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(607, 8, 8)
};
static uint32_t BCMI_EAGLE_XGXS_PLL_CAL_CTL_STS0r_fields[] =
{
    /* PLL_LOCK_LH_LL:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(558, 0, 0),
    /* PLL_SEQ_PASS_LH_LL:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(563, 1, 1),
    /* PLL_SEQ_DONE_LH_LL:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(561, 2, 2),
    /* FREQ_PASS_SM_LH_LL:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(405, 3, 3),
    /* FREQ_DONE_SM_LH_LL:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(402, 4, 4),
    /* CAP_PASS_LH_LL:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(198, 5, 5),
    /* CAP_DONE_LH_LL:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(194, 6, 6),
    /* PLL_LOCK:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(555, 8, 8),
    /* PLL_SEQ_PASS:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(562, 9, 9),
    /* PLL_SEQ_DONE:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(560, 10, 10),
    /* FREQ_PASS_SM:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(404, 11, 11),
    /* FREQ_DONE_SM:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(401, 12, 12),
    /* CAP_PASS:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(197, 13, 13),
    /* CAP_DONE:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(193, 14, 14),
    /* LOST_PLL_LOCK_SM:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(435, 15, 15)
};
static uint32_t BCMI_EAGLE_XGXS_PLL_CAL_CTL_STS1r_fields[] =
{
    /* CAP_SELECT:0:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(201, 7, 0),
    /* RESCAL_IN:8:11 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(609, 11, 8)
};
static uint32_t BCMI_EAGLE_XGXS_PLL_CAL_CTL_STS_DBGr_fields[] =
{
    /* DBG_SLOWDN:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(289, 0, 0),
    /* DBG_SLOWDN_CHANGE:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(290, 1, 1),
    /* DBG_FDBCK:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(286, 2, 2),
    /* DBG_CAP_STATE_ONE_HOT:3:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(285, 7, 3),
    /* DBG_PLL_STATE_ONE_HOT:8:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(288, 15, 8)
};
static uint32_t BCMI_EAGLE_XGXS_SIGDET_CTL0r_fields[] =
{
    /* SIGNAL_DETECT_FILTER_COUNT:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(655, 4, 0),
    /* LOS_FILTER_COUNT:8:12 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(436, 12, 8)
};
static uint32_t BCMI_EAGLE_XGXS_SIGDET_CTL1r_fields[] =
{
    /* AFE_SIGNAL_DETECT_DIS:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(7, 0, 0),
    /* EXT_LOS_EN:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(396, 1, 1),
    /* EXT_LOS_INV:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(397, 2, 2),
    /* IGNORE_LP_MODE:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(413, 3, 3),
    /* SIGNAL_DETECT_FILTER_1US:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(654, 4, 4),
    /* ENERGY_DETECT_FRC:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(391, 5, 5),
    /* ENERGY_DETECT_FRC_VAL:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(392, 6, 6),
    /* SIGNAL_DETECT_FRC:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(656, 7, 7),
    /* SIGNAL_DETECT_FRC_VAL:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(657, 8, 8),
    /* ENERGY_DETECT_MASK_COUNT:11:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(393, 15, 11)
};
static uint32_t BCMI_EAGLE_XGXS_SIGDET_CTL2r_fields[] =
{
    /* LOS_THRESH:0:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(437, 2, 0),
    /* SIGNAL_DETECT_THRESH:4:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(660, 6, 4),
    /* HOLD_LOS_COUNT:8:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(409, 10, 8),
    /* HOLD_SD_COUNT:11:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(410, 13, 11)
};
static uint32_t BCMI_EAGLE_XGXS_SIGDET_STS0r_fields[] =
{
    /* SIGNAL_DETECT:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(652, 0, 0),
    /* SIGNAL_DETECT_CHANGE:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(653, 1, 1),
    /* ENERGY_DETECT:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(389, 2, 2),
    /* ENERGY_DETECT_CHANGE:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(390, 3, 3),
    /* SIGNAL_DETECT_RAW:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(658, 4, 4),
    /* SIGNAL_DETECT_RAW_CHANGE:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(659, 5, 5),
    /* AFE_SIGDET_THRESH:8:10 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(6, 10, 8)
};
static uint32_t BCMI_EAGLE_XGXS_TLB_RX_DIG_LPBK_CFGr_fields[] =
{
    /* DIG_LPBK_EN:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(363, 0, 0),
    /* DIG_LPBK_PD_MODE:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(367, 1, 1),
    /* DIG_LPBK_PD_FLT_BYPASS:2:2 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(365, 2, 2)
};
static uint32_t BCMI_EAGLE_XGXS_TLB_RX_DIG_LPBK_PD_STSr_fields[] =
{
    /* DIG_LPBK_PD_LATE_IND:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(366, 0, 0),
    /* DIG_LPBK_PD_EARLY_IND:1:1 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(364, 1, 1)
};
static uint32_t BCMI_EAGLE_XGXS_TLB_RX_PMD_RX_LOCK_STSr_fields[] =
{
    /* PMD_RX_LOCK:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(575, 0, 0),
    /* PMD_RX_LOCK_CHANGE:1:1 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(576, 1, 1)
};
static uint32_t BCMI_EAGLE_XGXS_TLB_RX_PRBS_CHK_CFGr_fields[] =
{
    /* PRBS_CHK_EN:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(583, 0, 0),
    /* PRBS_CHK_MODE_SEL:1:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(595, 3, 1),
    /* PRBS_CHK_INV:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(590, 4, 4),
    /* PRBS_CHK_MODE:5:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(594, 6, 5),
    /* PRBS_CHK_EN_AUTO_MODE:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(584, 7, 7),
    /* PRBS_CHK_ERR_CNT_BURST_MODE:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(587, 9, 9),
    /* TRNSUM_ERROR_COUNT_EN:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(674, 10, 10),
    /* PRBS_CHK_CLK_EN_FRC_ON:11:11 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(582, 11, 11)
};
static uint32_t BCMI_EAGLE_XGXS_TLB_RX_PRBS_CHK_CNT_CFGr_fields[] =
{
    /* PRBS_CHK_LOCK_CNT:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(592, 4, 0),
    /* PRBS_CHK_OOL_CNT:8:12 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(596, 12, 8)
};
static uint32_t BCMI_EAGLE_XGXS_TLB_RX_PRBS_CHK_EN_TMR_CTLr_fields[] =
{
    /* PRBS_CHK_EN_TIMER_MODE:0:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(586, 1, 0),
    /* PRBS_CHK_EN_TIMEOUT:8:12 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(585, 12, 8)
};
static uint32_t BCMI_EAGLE_XGXS_TLB_RX_PRBS_CHK_ERR_CNT_LSB_STSr_fields[] =
{
    /* PRBS_CHK_ERR_CNT_LSB:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(588, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_TLB_RX_PRBS_CHK_ERR_CNT_MSB_STSr_fields[] =
{
    /* PRBS_CHK_ERR_CNT_MSB:0:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(589, 14, 0),
    /* PRBS_CHK_LOCK_LOST_LH:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(593, 15, 15)
};
static uint32_t BCMI_EAGLE_XGXS_TLB_RX_PRBS_CHK_LOCK_STSr_fields[] =
{
    /* PRBS_CHK_LOCK:0:0 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(591, 0, 0)
};
static uint32_t BCMI_EAGLE_XGXS_TLB_RX_TLB_RX_MISC_CFGr_fields[] =
{
    /* RX_PMD_DP_INVERT:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(645, 0, 0),
    /* RX_AGGREGATOR_BYPASS_EN:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(635, 1, 1),
    /* DBG_MASK_DIG_LPBK_EN:2:2 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(287, 2, 2)
};
static uint32_t BCMI_EAGLE_XGXS_TLB_TX_PATGEN_CFGr_fields[] =
{
    /* PATT_GEN_EN:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(523, 0, 0),
    /* PATT_GEN_STOP_POS:8:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(540, 11, 8),
    /* PATT_GEN_START_POS:12:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(539, 15, 12)
};
static uint32_t BCMI_EAGLE_XGXS_TLB_TX_PRBS_GEN_CFGr_fields[] =
{
    /* PRBS_GEN_EN:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(597, 0, 0),
    /* PRBS_GEN_MODE_SEL:1:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(600, 3, 1),
    /* PRBS_GEN_INV:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(599, 4, 4),
    /* PRBS_GEN_ERR_INS:5:5 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(598, 5, 5)
};
static uint32_t BCMI_EAGLE_XGXS_TLB_TX_RMT_LPBK_CFGr_fields[] =
{
    /* RMT_LPBK_EN:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(628, 0, 0),
    /* RMT_LPBK_PD_MODE:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(632, 1, 1),
    /* RMT_LPBK_PD_FRC_ON:2:2 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(630, 2, 2)
};
static uint32_t BCMI_EAGLE_XGXS_TLB_TX_RMT_LPBK_PD_STSr_fields[] =
{
    /* RMT_LPBK_PD_LATE_IND:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(631, 0, 0),
    /* RMT_LPBK_PD_EARLY_IND:1:1 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(629, 1, 1)
};
static uint32_t BCMI_EAGLE_XGXS_TLB_TX_TLB_TX_MISC_CFGr_fields[] =
{
    /* TX_PMD_DP_INVERT:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(758, 0, 0),
    /* TX_PCS_NATIVE_ANA_FRMT_EN:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(724, 1, 1),
    /* TX_MUX_SEL_ORDER:2:2 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(723, 2, 2)
};
static uint32_t BCMI_EAGLE_XGXS_TLB_TX_TX_PI_LOOP_TIMING_CFGr_fields[] =
{
    /* TX_PI_LOOP_TIMING_SRC_SEL:0:0 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(744, 0, 0)
};
static uint32_t BCMI_EAGLE_XGXS_TXFIR_CTL1r_fields[] =
{
    /* TXFIR_PRE_OVERRIDE:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(714, 4, 0),
    /* TXFIR_POST_OVERRIDE:5:10 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(710, 10, 5)
};
static uint32_t BCMI_EAGLE_XGXS_TXFIR_CTL2r_fields[] =
{
    /* TXFIR_MAIN_OVERRIDE:0:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(699, 6, 0),
    /* TXFIR_POST2:7:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(701, 11, 7),
    /* TXFIR_OVERRIDE_EN:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(700, 15, 15)
};
static uint32_t BCMI_EAGLE_XGXS_TXFIR_CTL3r_fields[] =
{
    /* TXFIR_PRE_OFFSET:0:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(713, 3, 0),
    /* TXFIR_MAIN_OFFSET:4:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(698, 7, 4),
    /* TXFIR_POST_OFFSET:8:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(709, 11, 8),
    /* TXFIR_POST2_OFFSET:12:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(703, 15, 12)
};
static uint32_t BCMI_EAGLE_XGXS_TXFIR_CTL4r_fields[] =
{
    /* TXFIR_POST3:0:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(704, 3, 0),
    /* TXFIR_POST3_OFFSET:8:11 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(706, 11, 8)
};
static uint32_t BCMI_EAGLE_XGXS_TXFIR_MISC_CTL1r_fields[] =
{
    /* SDK_TX_DISABLE:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(648, 0, 0),
    /* PMD_TX_DISABLE_PIN_DIS:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(579, 1, 1),
    /* TX_DISABLE_TIMER_CTRL:2:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(716, 7, 2),
    /* TX_EEE_QUIET_EN:8:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(718, 8, 8),
    /* TX_EEE_ALERT_EN:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(717, 9, 9),
    /* TX_DISABLE_OUTPUT_SEL:10:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(715, 11, 10),
    /* DP_RESET_TX_DISABLE_DIS:12:12 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(368, 12, 12)
};
static uint32_t BCMI_EAGLE_XGXS_TXFIR_STS1r_fields[] =
{
    /* TXFIR_PRE_AFTER_OVR:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(712, 4, 0),
    /* TXFIR_POST_AFTER_OVR:5:10 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(708, 10, 5)
};
static uint32_t BCMI_EAGLE_XGXS_TXFIR_STS2r_fields[] =
{
    /* TXFIR_MAIN_AFTER_OVR:0:6 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(697, 6, 0)
};
static uint32_t BCMI_EAGLE_XGXS_TXFIR_STS3r_fields[] =
{
    /* TXFIR_PRE_ADJUSTED:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(711, 4, 0),
    /* TXFIR_POST_ADJUSTED:5:10 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(707, 10, 5)
};
static uint32_t BCMI_EAGLE_XGXS_TXFIR_STS4r_fields[] =
{
    /* TXFIR_MAIN_ADJUSTED:0:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(696, 6, 0),
    /* TXFIR_POST2_ADJUSTED:7:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(702, 11, 7),
    /* TXFIR_POST3_ADJUSTED:12:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(705, 15, 12)
};
static uint32_t BCMI_EAGLE_XGXS_TXFIR_UC_CTLr_fields[] =
{
    /* MICRO_TX_DISABLE:0:0 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(504, 0, 0)
};
static uint32_t BCMI_EAGLE_XGXS_TX_PI_CTL0r_fields[] =
{
    /* TX_PI_EN:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(725, 0, 0),
    /* TX_PI_JITTER_FILTER_EN:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(737, 1, 1),
    /* TX_PI_EXT_CTRL_EN:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(726, 2, 2),
    /* TX_PI_FREQ_OVERRIDE_EN:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(730, 3, 3),
    /* TX_PI_SJ_GEN_EN:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(756, 4, 4),
    /* TX_PI_SSC_GEN_EN:5:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(757, 5, 5),
    /* TX_PI_JIT_SSC_FREQ_MODE:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(740, 6, 6),
    /* TX_PI_SECOND_ORDER_LOOP_EN:7:7 */
    PHYMOD_SYMBOL_FIELD_ENCODE(755, 7, 7),
    /* TX_PI_FIRST_ORDER_BWSEL_INTEG:8:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(728, 9, 8),
    /* TX_PI_SECOND_ORDER_BWSEL_INTEG:10:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(754, 11, 10),
    /* TX_PI_EXT_PHASE_BWSEL_INTEG:12:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(727, 14, 12)
};
static uint32_t BCMI_EAGLE_XGXS_TX_PI_CTL1r_fields[] =
{
    /* TX_PI_FREQ_OVERRIDE_VAL:0:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(731, 14, 0)
};
static uint32_t BCMI_EAGLE_XGXS_TX_PI_CTL2r_fields[] =
{
    /* TX_PI_JIT_FREQ_IDX:0:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(739, 5, 0),
    /* TX_PI_JIT_AMP:8:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(738, 13, 8)
};
static uint32_t BCMI_EAGLE_XGXS_TX_PI_CTL3r_fields[] =
{
    /* TX_PI_PHASE_OVERRIDE:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(748, 0, 0),
    /* TX_PI_PHASE_STROBE:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(751, 1, 1),
    /* TX_PI_PHASE_STEP_DIR:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(749, 2, 2),
    /* TX_PI_PHASE_INVERT:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(747, 4, 4),
    /* TX_PI_PHASE_STEP_NUM:8:11 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(750, 11, 8)
};
static uint32_t BCMI_EAGLE_XGXS_TX_PI_CTL4r_fields[] =
{
    /* TX_PI_FRZ_FRC:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(732, 0, 0),
    /* TX_PI_FRZ_FRC_VAL:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(733, 1, 1),
    /* TX_PI_FRZ_MODE:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(734, 2, 2),
    /* TX_PI_RESET_CODE_DBG:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(752, 3, 3),
    /* TX_PI_RMT_LPBK_BYPASS_FLT:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(753, 4, 4),
    /* TX_PI_FRC_PHASE_STEP_MUX_SEL:5:5 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(729, 5, 5)
};
static uint32_t BCMI_EAGLE_XGXS_TX_PI_CTL6r_fields[] =
{
    /* TX_PI_LANE_SEL_FRC_VAL:0:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(742, 4, 0),
    /* TX_PI_LANE_SEL_FRC:8:8 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(741, 8, 8)
};
static uint32_t BCMI_EAGLE_XGXS_TX_PI_STS0r_fields[] =
{
    /* TX_PI_PHASE_CNTR:0:6 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(745, 6, 0)
};
static uint32_t BCMI_EAGLE_XGXS_TX_PI_STS1r_fields[] =
{
    /* TX_PI_INTEG1_REG:0:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(735, 13, 0)
};
static uint32_t BCMI_EAGLE_XGXS_TX_PI_STS2r_fields[] =
{
    /* TX_PI_INTEG2_REG:0:14 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(736, 14, 0)
};
static uint32_t BCMI_EAGLE_XGXS_TX_PI_STS3r_fields[] =
{
    /* TX_PI_PHASE_ERR:0:5 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(746, 5, 0)
};
static uint32_t BCMI_EAGLE_XGXS_UC_ADDRr_fields[] =
{
    /* MICRO_RAM_ADDRESS:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(488, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_UC_COMMANDr_fields[] =
{
    /* MICRO_RUN:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(494, 0, 0),
    /* MICRO_STOP:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(500, 1, 1),
    /* MICRO_READ:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(493, 2, 2),
    /* MICRO_WRITE:3:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(507, 3, 3),
    /* MICRO_MDIO_DW8051_RESET_N:4:4 */
    PHYMOD_SYMBOL_FIELD_ENCODE(474, 4, 4),
    /* MICRO_MDIO_RAM_READ_AUTOINC_EN:6:6 */
    PHYMOD_SYMBOL_FIELD_ENCODE(478, 6, 6),
    /* MICRO_MDIO_RAM_ACCESS_MODE:7:8 */
    PHYMOD_SYMBOL_FIELD_ENCODE(477, 8, 7),
    /* MICRO_BYTE_MODE:9:9 */
    PHYMOD_SYMBOL_FIELD_ENCODE(461, 9, 9),
    /* MICRO_MDIO_AUTOWAKEUP:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(473, 10, 10),
    /* MICRO_MDIO_PROG_RAM_CS_FRC:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(475, 11, 11),
    /* MICRO_MDIO_PROG_RAM_CS_FRC_VAL:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(476, 12, 12),
    /* MICRO_PMI_HP_ACK_FRC:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(482, 13, 13),
    /* MICRO_PMI_HP_ACK_FRC_VAL:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(483, 14, 14),
    /* MICRO_INIT_CMD:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(468, 15, 15)
};
static uint32_t BCMI_EAGLE_XGXS_UC_COMMAND2r_fields[] =
{
    /* MICRO_PMI_ACK_TIMEOUT_VAL:0:3 */
    PHYMOD_SYMBOL_FIELD_ENCODE(481, 3, 0),
    /* MICRO_SRST_MDIO_DATARAM_ACCESS:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(496, 10, 10),
    /* MICRO_RAM_CLK_INVERT:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(489, 11, 11),
    /* MICRO_ZERO_ROM_DATAOUT:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(508, 12, 12),
    /* MICRO_SRST_MDIO_LOAD_PROGRAM_RAM:13:13 */
    PHYMOD_SYMBOL_FIELD_ENCODE(497, 13, 13),
    /* MICRO_SRST_MDIO_PROGRAM_ACCESS:14:14 */
    PHYMOD_SYMBOL_FIELD_ENCODE(498, 14, 14),
    /* MICRO_SRST_DW8051_TO_PMI:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(495, 15, 15)
};
static uint32_t BCMI_EAGLE_XGXS_UC_COMMAND3r_fields[] =
{
    /* MICRO_PRAM_IF_EN:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(484, 0, 0),
    /* MICRO_PRAM_IF_FLOP_BYPASS:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(485, 1, 1),
    /* MICRO_PRAM_IF_RSTB:2:2 */
    PHYMOD_SYMBOL_FIELD_ENCODE(486, 2, 2),
    /* MICRO_INRUSH_CURRENT_FRC:10:10 */
    PHYMOD_SYMBOL_FIELD_ENCODE(470, 10, 10),
    /* MICRO_INRUSH_CURRENT_FRC_VAL:11:11 */
    PHYMOD_SYMBOL_FIELD_ENCODE(471, 11, 11),
    /* MICRO_DISABLE_ECC:12:12 */
    PHYMOD_SYMBOL_FIELD_ENCODE(463, 12, 12),
    /* MICRO_GEN_STATUS_SEL:13:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(467, 15, 13)
};
static uint32_t BCMI_EAGLE_XGXS_UC_COMMAND4r_fields[] =
{
    /* MICRO_SYSTEM_CLK_EN:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(501, 0, 0),
    /* MICRO_SYSTEM_RESET_N:1:1 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(502, 1, 1)
};
static uint32_t BCMI_EAGLE_XGXS_UC_DATARAM_CTL1r_fields[] =
{
    /* MICRO_DATARAM_TM:0:9 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(462, 9, 0)
};
static uint32_t BCMI_EAGLE_XGXS_UC_DWNLOAD_STSr_fields[] =
{
    /* MICRO_ERR0:0:0 */
    PHYMOD_SYMBOL_FIELD_ENCODE(464, 0, 0),
    /* MICRO_ERR1:1:1 */
    PHYMOD_SYMBOL_FIELD_ENCODE(465, 1, 1),
    /* MICRO_FSM:2:5 */
    PHYMOD_SYMBOL_FIELD_ENCODE(466, 5, 2),
    /* MICRO_INIT_DONE:15:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(469, 15, 15)
};
static uint32_t BCMI_EAGLE_XGXS_UC_IRAM_CTL1r_fields[] =
{
    /* MICRO_IRAM_TM:0:9 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(472, 9, 0)
};
static uint32_t BCMI_EAGLE_XGXS_UC_MDIO_UC_MAILBOX_LSWr_fields[] =
{
    /* MICRO_MDIO_UC_MAILBOX_LSW:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(479, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_UC_MDIO_UC_MAILBOX_MSWr_fields[] =
{
    /* MICRO_MDIO_UC_MAILBOX_MSW:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(480, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_UC_PROGRAM_RAM_CTL1r_fields[] =
{
    /* MICRO_PROGRAM_RAM_TM:0:13 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(487, 13, 0)
};
static uint32_t BCMI_EAGLE_XGXS_UC_RAMWORDr_fields[] =
{
    /* MICRO_RAM_COUNT:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(490, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_UC_RAM_RDDATAr_fields[] =
{
    /* MICRO_RAM_RDDATA:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(491, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_UC_RAM_WRDATAr_fields[] =
{
    /* MICRO_RAM_WRDATA:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(492, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_UC_SFR_STSr_fields[] =
{
    /* MICRO_STATUS_MUXED:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(499, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_UC_TEMPERATURE_STSr_fields[] =
{
    /* MICRO_TEMPATURE_DATA:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(503, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_UC_UC_MDIO_MAILBOX_LSWr_fields[] =
{
    /* MICRO_UC_MDIO_MAILBOX_LSW:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(505, 15, 0)
};
static uint32_t BCMI_EAGLE_XGXS_UC_UC_MDIO_MAILBOX_MSWr_fields[] =
{
    /* MICRO_UC_MDIO_MAILBOX_MSW:0:15 */
    PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(506, 15, 0)
};



/*******************************************************************************
 *
 * The following is the field name table.
 */
#if PHYMOD_CONFIG_INCLUDE_FIELD_NAMES == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_NAMES_BCMI_EAGLE_XGXS
const char* bcmi_eagle_xgxs_fields[] = 
{
    "ACQ_CDR_TIMEOUT",
    "AFE_RX_PWRDN_FRC",
    "AFE_RX_PWRDN_FRC_VAL",
    "AFE_RX_RESET_FRC",
    "AFE_RX_RESET_FRC_VAL",
    "AFE_SIGDET_PWRDN",
    "AFE_SIGDET_THRESH",
    "AFE_SIGNAL_DETECT_DIS",
    "AFE_S_PLL_PWRDN",
    "AFE_S_PLL_RESET_FRC",
    "AFE_S_PLL_RESET_FRC_VAL",
    "AFE_TX_PWRDN_FRC",
    "AFE_TX_PWRDN_FRC_VAL",
    "AFE_TX_RESET_FRC",
    "AFE_TX_RESET_FRC_VAL",
    "AMS_PLL_2RX_CLKBW",
    "AMS_PLL_BGCALR_CTATADJ",
    "AMS_PLL_BGCALR_PTATADJ",
    "AMS_PLL_BGINT",
    "AMS_PLL_BGIP",
    "AMS_PLL_BGR_CTATADJ",
    "AMS_PLL_BGR_PTATADJ",
    "AMS_PLL_CAL_AUX",
    "AMS_PLL_CAL_OFF",
    "AMS_PLL_COMP_VTH",
    "AMS_PLL_DBLR_CTRL",
    "AMS_PLL_DITHEREN",
    "AMS_PLL_ENABLE_FTUNE",
    "AMS_PLL_EN_HRZ",
    "AMS_PLL_FORCE_KVH_BW",
    "AMS_PLL_FORCE_RESCAL",
    "AMS_PLL_FP3_CTRL",
    "AMS_PLL_FP3_RH",
    "AMS_PLL_FRACN_BYPASS",
    "AMS_PLL_FRACN_DIVRANGE",
    "AMS_PLL_FRACN_DIV_H",
    "AMS_PLL_FRACN_DIV_L",
    "AMS_PLL_FRACN_NDIV_INT",
    "AMS_PLL_FRACN_SEL",
    "AMS_PLL_IMAX_I10GBUF",
    "AMS_PLL_IMAX_IBIAS",
    "AMS_PLL_IMAX_ICK",
    "AMS_PLL_IMAX_ICKGEN",
    "AMS_PLL_IMAX_ICLKIDRV1",
    "AMS_PLL_IMAX_ICLKINT",
    "AMS_PLL_IMAX_ICML",
    "AMS_PLL_IMAX_ICOMP",
    "AMS_PLL_IMAX_ICP",
    "AMS_PLL_IMAX_IOP",
    "AMS_PLL_IMIN_I10GBUF",
    "AMS_PLL_IMIN_IBIAS",
    "AMS_PLL_IMIN_ICK",
    "AMS_PLL_IMIN_ICKGEN",
    "AMS_PLL_IMIN_ICLKIDRV1",
    "AMS_PLL_IMIN_ICLKINT",
    "AMS_PLL_IMIN_ICML",
    "AMS_PLL_IMIN_ICOMP",
    "AMS_PLL_IMIN_ICP",
    "AMS_PLL_IMIN_IOP",
    "AMS_PLL_IMODE_I10GBUF",
    "AMS_PLL_IMODE_IBIAS",
    "AMS_PLL_IMODE_ICK",
    "AMS_PLL_IMODE_ICKGEN",
    "AMS_PLL_IMODE_ICLKIDRV1",
    "AMS_PLL_IMODE_ICLKINT",
    "AMS_PLL_IMODE_ICML",
    "AMS_PLL_IMODE_ICOMP",
    "AMS_PLL_IMODE_ICP",
    "AMS_PLL_IMODE_IOP",
    "AMS_PLL_IQP",
    "AMS_PLL_IVCO",
    "AMS_PLL_KVH_FORCE",
    "AMS_PLL_LOWPWR_6G",
    "AMS_PLL_MAX_TEST_PORT_AMPL",
    "AMS_PLL_MIX2P1CR_CTATADJ",
    "AMS_PLL_MIX2P1CR_PTATADJ",
    "AMS_PLL_PDF_FD_SKEW",
    "AMS_PLL_PDF_REF_SKEW",
    "AMS_PLL_PDF_SKEW_ENLARGE",
    "AMS_PLL_REFCLK_DOUBLER",
    "AMS_PLL_REFH_PLL",
    "AMS_PLL_REFL_PLL",
    "AMS_PLL_RESET",
    "AMS_PLL_SPARE_100",
    "AMS_PLL_SPARE_18",
    "AMS_PLL_STS",
    "AMS_PLL_TEST_FRACN_EN",
    "AMS_PLL_TEST_PLL",
    "AMS_PLL_TEST_PNP",
    "AMS_PLL_TEST_RX",
    "AMS_PLL_TEST_VC",
    "AMS_PLL_TEST_VREF",
    "AMS_PLL_TXCG_VDDR_BGB",
    "AMS_PLL_TX_LOWPWR_6G",
    "AMS_PLL_VBYPASS",
    "AMS_PLL_VCOICTRL",
    "AMS_PLL_VCO_DIV2",
    "AMS_PLL_VCO_DIV4",
    "AMS_PLL_VCO_IMAX",
    "AMS_PLL_VDDR_BGB",
    "AMS_RX_DC_COUPLE",
    "AMS_RX_DC_OFFSET",
    "AMS_RX_DC_OFFSET_RANGE",
    "AMS_RX_DFE_OS2X_MODE",
    "AMS_RX_EN_10GMODE",
    "AMS_RX_EN_VCCTRL",
    "AMS_RX_FORCE_DC_OFFSET",
    "AMS_RX_I1P25DFE",
    "AMS_RX_I4DEADZONE",
    "AMS_RX_IMAX_COMMONMODE",
    "AMS_RX_IMAX_CTAT",
    "AMS_RX_IMAX_DC_OFFSET_DAC",
    "AMS_RX_IMAX_DFE_SUMMER",
    "AMS_RX_IMAX_DFE_TAP_WEIGHT",
    "AMS_RX_IMAX_METRES_EYEDIAG",
    "AMS_RX_IMAX_PF",
    "AMS_RX_IMAX_PHASE_INT",
    "AMS_RX_IMAX_PHASE_INT_P1",
    "AMS_RX_IMAX_SIGNAL_DETECT",
    "AMS_RX_IMAX_SLICER",
    "AMS_RX_IMAX_VGA",
    "AMS_RX_IMIN_COMMONMODE",
    "AMS_RX_IMIN_CTAT",
    "AMS_RX_IMIN_DC_OFFSET_DAC",
    "AMS_RX_IMIN_DFE_SUMMER",
    "AMS_RX_IMIN_DFE_TAP_WEIGHT",
    "AMS_RX_IMIN_METRES_EYEDIAG",
    "AMS_RX_IMIN_PF",
    "AMS_RX_IMIN_PHASE_INT",
    "AMS_RX_IMIN_PHASE_INT_P1",
    "AMS_RX_IMIN_SIGNAL_DETECT",
    "AMS_RX_IMIN_SLICER",
    "AMS_RX_IMIN_VGA",
    "AMS_RX_IMODE_CTAT",
    "AMS_RX_IMODE_DC_OFFSET_DAC",
    "AMS_RX_IMODE_DFE_SUMMER",
    "AMS_RX_IMODE_DFE_TAP_WEIGHT",
    "AMS_RX_IMODE_METRES_EYEDIAG",
    "AMS_RX_IMODE_PF",
    "AMS_RX_IMODE_PHASE_INT",
    "AMS_RX_IMODE_PHASE_INT_P1",
    "AMS_RX_IMODE_SIGNAL_DETECT",
    "AMS_RX_IMODE_SLICER",
    "AMS_RX_IMODE_VGA",
    "AMS_RX_IMOD_COMMONMODE",
    "AMS_RX_PHASE_INT_AMPL_CTRL",
    "AMS_RX_PHS_INTERP_RESCAL_MUX",
    "AMS_RX_SEL_DFECKDELAY",
    "AMS_RX_SEL_TH4DFE",
    "AMS_RX_SEL_UGBW",
    "AMS_RX_SIGDET_BYPASS",
    "AMS_RX_SIGDET_LOW_POWER",
    "AMS_RX_SIGDET_THRESHOLD",
    "AMS_RX_SIG_PWRDN",
    "AMS_RX_SPARE_32",
    "AMS_RX_SPARE_33",
    "AMS_RX_SPARE_34",
    "AMS_RX_SPARE_46",
    "AMS_RX_SPARE_47",
    "AMS_RX_SPARE_62",
    "AMS_RX_SPARE_63",
    "AMS_RX_STS",
    "AMS_RX_TPORT_EN",
    "AMS_RX_VGA_BW_EXTENSION",
    "AMS_RX_VGA_OUTPUT_IDLE",
    "AMS_RX_VGA_RESCAL_MUX",
    "AMS_TX_AMP_CTL",
    "AMS_TX_CAL_AUX",
    "AMS_TX_CAL_OFF",
    "AMS_TX_DCC_DIS",
    "AMS_TX_DCC_SEL",
    "AMS_TX_DRIVERMODE",
    "AMS_TX_ELEC_IDLE_AUX",
    "AMS_TX_IBIAS",
    "AMS_TX_ICML",
    "AMS_TX_IDCC",
    "AMS_TX_KR_TEST_MODE",
    "AMS_TX_LP_OVRD",
    "AMS_TX_OSR4",
    "AMS_TX_POST2_COEF",
    "AMS_TX_POST3_COEF",
    "AMS_TX_SEL_HALFRATE",
    "AMS_TX_SIGN_POST2",
    "AMS_TX_SIGN_POST3",
    "AMS_TX_SPARE_1",
    "AMS_TX_SPARE_2",
    "AMS_TX_SPARE_3",
    "AMS_TX_SPARE_30_25",
    "AMS_TX_STS",
    "AMS_TX_TEST_DATA",
    "AMS_TX_TICKSEL",
    "BR_PD_EN",
    "CAP_CNT_MASK_EN",
    "CAP_DONE",
    "CAP_DONE_LH_LL",
    "CAP_FORCE_SLOWDOWN",
    "CAP_FORCE_SLOWDOWN_EN",
    "CAP_PASS",
    "CAP_PASS_LH_LL",
    "CAP_RESTART",
    "CAP_RETRY_EN",
    "CAP_SELECT",
    "CAP_SELECT_M",
    "CAP_SELECT_M_EN",
    "CAP_SEQ_CYA",
    "CDR_BWSEL_INTEG_ACQCDR",
    "CDR_BWSEL_INTEG_EEE_ACQCDR",
    "CDR_BWSEL_INTEG_NORM",
    "CDR_BWSEL_PROP_ACQCDR",
    "CDR_BWSEL_PROP_EEE_ACQCDR",
    "CDR_BWSEL_PROP_NORM",
    "CDR_FREQ_EN",
    "CDR_FREQ_OVERRIDE_EN",
    "CDR_FREQ_OVERRIDE_VAL",
    "CDR_FRZ_FRC",
    "CDR_FRZ_FRC_VAL",
    "CDR_INTEG_REG",
    "CDR_INTEG_REG_CLR",
    "CDR_INTEG_SAT_SEL",
    "CDR_LM_OUTOFLOCK",
    "CDR_LM_THR_SEL",
    "CDR_PHASE_ERR",
    "CDR_PHASE_ERR_FRZ",
    "CDR_PHASE_SAT_CTRL",
    "CDR_QPHASE_MULT_EN",
    "CDR_SETTLE_TIMEOUT",
    "CDR_ZERO_POLARITY",
    "CL72_BAD_MARKER_CNT",
    "CL72_BRK_RING_OSC",
    "CL72_CTRL_FRAME_DLY",
    "CL72_DIS_LP_COEFF_UPDATES_TO_LD",
    "CL72_DIS_MAX_WAIT_TIMER",
    "CL72_DME_CELL_BOUNDARY_CHK",
    "CL72_DOUBLE_CMD_EN",
    "CL72_FRAME_LOCK_LH",
    "CL72_FRAME_LOCK_RDY_FOR_CMD_EN",
    "CL72_GOOD_MARKER_CNT",
    "CL72_IEEE_FRAME_LOCK",
    "CL72_IEEE_LD_COEFF_UPDATE",
    "CL72_IEEE_LD_STATUS_REPORT",
    "CL72_IEEE_LP_COEFF_UPDATE",
    "CL72_IEEE_LP_STATUS_REPORT",
    "CL72_IEEE_RECEIVER_STATUS",
    "CL72_IEEE_RESTART_TRAINING",
    "CL72_IEEE_TRAINING_ENABLE",
    "CL72_IEEE_TRAINING_FAILURE",
    "CL72_IEEE_TRAINING_STATUS",
    "CL72_INC_DEC_VAL_SEL",
    "CL72_LD_COEFF_CMD_HIST",
    "CL72_LD_STATUS_PAGE",
    "CL72_LD_XMT_STATUS_LOAD",
    "CL72_LD_XMT_STATUS_OVERRIDE",
    "CL72_LP_CONTROL_PAGE",
    "CL72_OVERRIDE_LD_STATUS_PAGE",
    "CL72_PPM_OFFSET_EN",
    "CL72_RCVD_STATUS_PAGE",
    "CL72_READY_FOR_CMD",
    "CL72_RX_DP_LN_CLK_EN",
    "CL72_RX_TRAINED",
    "CL72_SIGNAL_DETECT",
    "CL72_SIGNAL_DET_FRC",
    "CL72_STRICT_DME_CHK",
    "CL72_STRICT_MARKER_CHK",
    "CL72_TAP_V2_VAL",
    "CL72_TIMER_EN",
    "CL72_TR_COARSE_LOCK",
    "CL72_TX_DP_LN_CLK_EN",
    "CL72_TX_FIR_TAP_MAIN_KR_INIT_VAL",
    "CL72_TX_FIR_TAP_POST_KR_INIT_VAL",
    "CL72_TX_FIR_TAP_PRE_KR_INIT_VAL",
    "CL72_V2_CONSTRAINT_DIS",
    "CL72_XMT_UPDATE_PAGE",
    "CNT_BIN_D_DREG",
    "CNT_BIN_D_MREG",
    "CNT_BIN_M1_MREG",
    "CNT_BIN_M1_PREG",
    "CNT_BIN_P1_DREG",
    "CNT_BIN_P1_PREG",
    "CNT_D_MINUS_M1",
    "CNT_D_MINUS_P1",
    "CORE_DP_RESET_STATE",
    "CORE_DP_S_RSTB",
    "CORE_MULTICAST_MASK_CONTROL",
    "CORE_REG_RESET_OCCURRED",
    "CORE_S_RSTB",
    "DBG_CAP_STATE_ONE_HOT",
    "DBG_FDBCK",
    "DBG_MASK_DIG_LPBK_EN",
    "DBG_PLL_STATE_ONE_HOT",
    "DBG_SLOWDN",
    "DBG_SLOWDN_CHANGE",
    "DC_OFFSET",
    "DFE_1_ACC_CLR",
    "DFE_1_CMN",
    "DFE_1_CMN_ONLY",
    "DFE_1_E",
    "DFE_1_EN",
    "DFE_1_ERR_GAIN",
    "DFE_1_ERR_SEL",
    "DFE_1_GRADIENT_INVERT",
    "DFE_1_INV_M1",
    "DFE_1_INV_P1",
    "DFE_1_O",
    "DFE_1_PATTERN",
    "DFE_1_PATTERN_BIT_EN",
    "DFE_1_WANTS_NEGATIVE",
    "DFE_2_ACC_CLR",
    "DFE_2_CMN",
    "DFE_2_CMN_ONLY",
    "DFE_2_E",
    "DFE_2_EN",
    "DFE_2_ERR_GAIN",
    "DFE_2_ERR_SEL",
    "DFE_2_GRADIENT_INVERT",
    "DFE_2_INV_M1",
    "DFE_2_INV_P1",
    "DFE_2_O",
    "DFE_2_PATTERN",
    "DFE_2_PATTERN_BIT_EN",
    "DFE_2_SE",
    "DFE_2_SO",
    "DFE_3_ACC_CLR",
    "DFE_3_CMN",
    "DFE_3_EN",
    "DFE_3_ERR_GAIN",
    "DFE_3_ERR_SEL",
    "DFE_3_GRADIENT_INVERT",
    "DFE_3_INV_M1",
    "DFE_3_INV_P1",
    "DFE_3_PATTERN",
    "DFE_3_PATTERN_BIT_EN",
    "DFE_4_ACC_CLR",
    "DFE_4_CMN",
    "DFE_4_EN",
    "DFE_4_ERR_GAIN",
    "DFE_4_ERR_SEL",
    "DFE_4_GRADIENT_INVERT",
    "DFE_4_INV_M1",
    "DFE_4_INV_P1",
    "DFE_4_PATTERN",
    "DFE_4_PATTERN_BIT_EN",
    "DFE_5_ACC_CLR",
    "DFE_5_CMN",
    "DFE_5_EN",
    "DFE_5_ERR_GAIN",
    "DFE_5_ERR_SEL",
    "DFE_5_GRADIENT_INVERT",
    "DFE_5_INV_M1",
    "DFE_5_INV_P1",
    "DFE_5_PATTERN",
    "DFE_5_PATTERN_BIT_EN",
    "DFE_ACC_HYS_EN",
    "DFE_ALLOW_SIMULT",
    "DFE_OFFSET_ADJ_DATA_EVEN",
    "DFE_OFFSET_ADJ_DATA_ODD",
    "DFE_OFFSET_ADJ_M1_EVEN",
    "DFE_OFFSET_ADJ_M1_ODD",
    "DFE_OFFSET_ADJ_P1_EVEN",
    "DFE_OFFSET_ADJ_P1_ODD",
    "DFE_UPDATE_GAIN",
    "DFE_VGA_WRITE_EN",
    "DFE_VGA_WRITE_TAPSEL",
    "DFE_VGA_WRITE_VAL",
    "DIG_LPBK_EN",
    "DIG_LPBK_PD_EARLY_IND",
    "DIG_LPBK_PD_FLT_BYPASS",
    "DIG_LPBK_PD_LATE_IND",
    "DIG_LPBK_PD_MODE",
    "DP_RESET_TX_DISABLE_DIS",
    "DSC_CLR_FRC",
    "DSC_CLR_FRC_VAL",
    "DSC_SM_GP_UC_REQ",
    "DSC_SM_READY_FOR_CMD",
    "DSC_SM_SCRATCH",
    "DSC_STATE",
    "DSC_STATE_EEE_ONE_HOT",
    "DSC_STATE_ONE_HOT",
    "EEE_ACQ_CDR_TIMEOUT",
    "EEE_ANA_PWR_TIMEOUT",
    "EEE_CDR_SETTLE_TIMEOUT",
    "EEE_HW_TUNE_TIMEOUT",
    "EEE_LFSR_CNT",
    "EEE_MEASURE_CNT",
    "EEE_MEASURE_EN",
    "EEE_MODE_EN",
    "EEE_PHASE_ERR_OFFSET",
    "EEE_PHASE_ERR_OFFSET_EN",
    "EEE_QUIET_FROM_EEE_STATES",
    "EEE_QUIET_RX_AFE_PWRDWN_VAL",
    "ENERGY_DETECT",
    "ENERGY_DETECT_CHANGE",
    "ENERGY_DETECT_FRC",
    "ENERGY_DETECT_FRC_VAL",
    "ENERGY_DETECT_MASK_COUNT",
    "EN_DFE_CLK",
    "EN_HGAIN",
    "EXT_LOS_EN",
    "EXT_LOS_INV",
    "FAST_SEARCH_MODE",
    "FREQ_DET_RESTART_EN",
    "FREQ_DET_RETRY_EN",
    "FREQ_DONE_SM",
    "FREQ_DONE_SM_LH_LL",
    "FREQ_MONITOR_EN",
    "FREQ_PASS_SM",
    "FREQ_PASS_SM_LH_LL",
    "FREQ_UPD_EN_FRC",
    "FREQ_UPD_EN_FRC_VAL",
    "HEARTBEAT_COUNT_1US",
    "HOLD_LOS_COUNT",
    "HOLD_SD_COUNT",
    "HW_TUNE_EN",
    "HW_TUNE_TIMEOUT",
    "IGNORE_LP_MODE",
    "IGNORE_RX_MODE",
    "LANE_ADDR_0",
    "LANE_ADDR_1",
    "LANE_ADDR_2",
    "LANE_ADDR_3",
    "LANE_DP_RESET_STATE",
    "LANE_MULTICAST_MASK_CONTROL",
    "LANE_REG_RESET_OCCURRED",
    "LANE_RESET_RELEASED",
    "LANE_RESET_RELEASED_INDEX",
    "LN_DP_S_RSTB",
    "LN_RX_DP_S_RSTB",
    "LN_RX_S_CLKGATE_FRC_ON",
    "LN_RX_S_COMCLK_FRC_ON",
    "LN_RX_S_COMCLK_SEL",
    "LN_RX_S_PWRDN",
    "LN_RX_S_RSTB",
    "LN_S_RSTB",
    "LN_TX_DP_S_RSTB",
    "LN_TX_S_PWRDN",
    "LN_TX_S_RSTB",
    "LOST_PLL_LOCK_SM",
    "LOS_FILTER_COUNT",
    "LOS_THRESH",
    "M1_THRESH_SEL",
    "M1_THRESH_ZERO",
    "MAIN_TAP_LIMIT",
    "MAIN_TAP_MIN_VAL",
    "MAX_WAIT_TIMER_PERIOD",
    "MDIO_ADDR_DATA",
    "MDIO_AER",
    "MDIO_BLK_ADDR",
    "MDIO_BRCST_PORT_ADDR",
    "MDIO_DEVAD",
    "MDIO_DEV_AN_EN",
    "MDIO_DEV_CL22_EN",
    "MDIO_DEV_DTE_EN",
    "MDIO_DEV_PCS_EN",
    "MDIO_DEV_PHY_EN",
    "MDIO_DEV_PMD_EN",
    "MDIO_FUNCTION",
    "MDIO_MASKDATA",
    "MDIO_MULTI_MMDS_EN",
    "MDIO_MULTI_PRTS_EN",
    "MEASURE_LFSR_CNT",
    "MEASURE_TIMEOUT",
    "MEAS_INCOMPLETE",
    "MICRO_BYTE_MODE",
    "MICRO_DATARAM_TM",
    "MICRO_DISABLE_ECC",
    "MICRO_ERR0",
    "MICRO_ERR1",
    "MICRO_FSM",
    "MICRO_GEN_STATUS_SEL",
    "MICRO_INIT_CMD",
    "MICRO_INIT_DONE",
    "MICRO_INRUSH_CURRENT_FRC",
    "MICRO_INRUSH_CURRENT_FRC_VAL",
    "MICRO_IRAM_TM",
    "MICRO_MDIO_AUTOWAKEUP",
    "MICRO_MDIO_DW8051_RESET_N",
    "MICRO_MDIO_PROG_RAM_CS_FRC",
    "MICRO_MDIO_PROG_RAM_CS_FRC_VAL",
    "MICRO_MDIO_RAM_ACCESS_MODE",
    "MICRO_MDIO_RAM_READ_AUTOINC_EN",
    "MICRO_MDIO_UC_MAILBOX_LSW",
    "MICRO_MDIO_UC_MAILBOX_MSW",
    "MICRO_PMI_ACK_TIMEOUT_VAL",
    "MICRO_PMI_HP_ACK_FRC",
    "MICRO_PMI_HP_ACK_FRC_VAL",
    "MICRO_PRAM_IF_EN",
    "MICRO_PRAM_IF_FLOP_BYPASS",
    "MICRO_PRAM_IF_RSTB",
    "MICRO_PROGRAM_RAM_TM",
    "MICRO_RAM_ADDRESS",
    "MICRO_RAM_CLK_INVERT",
    "MICRO_RAM_COUNT",
    "MICRO_RAM_RDDATA",
    "MICRO_RAM_WRDATA",
    "MICRO_READ",
    "MICRO_RUN",
    "MICRO_SRST_DW8051_TO_PMI",
    "MICRO_SRST_MDIO_DATARAM_ACCESS",
    "MICRO_SRST_MDIO_LOAD_PROGRAM_RAM",
    "MICRO_SRST_MDIO_PROGRAM_ACCESS",
    "MICRO_STATUS_MUXED",
    "MICRO_STOP",
    "MICRO_SYSTEM_CLK_EN",
    "MICRO_SYSTEM_RESET_N",
    "MICRO_TEMPATURE_DATA",
    "MICRO_TX_DISABLE",
    "MICRO_UC_MDIO_MAILBOX_LSW",
    "MICRO_UC_MDIO_MAILBOX_MSW",
    "MICRO_WRITE",
    "MICRO_ZERO_ROM_DATAOUT",
    "OFFSET_FASTACQ",
    "OFFSET_PD",
    "OSR_MODE",
    "OSR_MODE_FRC",
    "OSR_MODE_FRC_VAL",
    "OSR_MODE_PIN",
    "OSX2P_PHERR_GAIN",
    "P1_EYEDIAG_BIN",
    "P1_EYEDIAG_EN",
    "P1_OFFSET",
    "P1_OFFSET_EN",
    "P1_OFF_3LEVELQ_EN",
    "P1_THRESH_SEL",
    "PATTERN_SEL",
    "PATT_GEN_EN",
    "PATT_GEN_SEQ_0",
    "PATT_GEN_SEQ_1",
    "PATT_GEN_SEQ_10",
    "PATT_GEN_SEQ_11",
    "PATT_GEN_SEQ_12",
    "PATT_GEN_SEQ_13",
    "PATT_GEN_SEQ_14",
    "PATT_GEN_SEQ_2",
    "PATT_GEN_SEQ_3",
    "PATT_GEN_SEQ_4",
    "PATT_GEN_SEQ_5",
    "PATT_GEN_SEQ_6",
    "PATT_GEN_SEQ_7",
    "PATT_GEN_SEQ_8",
    "PATT_GEN_SEQ_9",
    "PATT_GEN_START_POS",
    "PATT_GEN_STOP_POS",
    "PD_CH_P1",
    "PF2_LOWP_CTRL",
    "PF_CTRL",
    "PF_HIZ",
    "PHASE_ERR_OFFSET",
    "PHASE_ERR_OFFSET_EN",
    "PHASE_ERR_OFFSET_MULT_2",
    "PLL_FORCE_CAP_DONE",
    "PLL_FORCE_CAP_DONE_EN",
    "PLL_FORCE_CAP_PASS",
    "PLL_FORCE_CAP_PASS_EN",
    "PLL_FORCE_FDONE",
    "PLL_FORCE_FDONE_EN",
    "PLL_FORCE_FPASS",
    "PLL_LOCK",
    "PLL_LOCK_FRC",
    "PLL_LOCK_FRC_VAL",
    "PLL_LOCK_LH_LL",
    "PLL_MODE",
    "PLL_SEQ_DONE",
    "PLL_SEQ_DONE_LH_LL",
    "PLL_SEQ_PASS",
    "PLL_SEQ_PASS_LH_LL",
    "PLL_SEQ_START",
    "PMD_CORE_DP_H_RSTB_PKILL",
    "PMD_CORE_MODE",
    "PMD_LANE_MODE",
    "PMD_LN_DP_H_RSTB_PKILL",
    "PMD_LN_H_RSTB_PKILL",
    "PMD_LN_RX_H_PWRDN_PKILL",
    "PMD_LN_TX_H_PWRDN_PKILL",
    "PMD_MDIO_TRANS_PKILL",
    "PMD_RX_CLK_VLD_FRC",
    "PMD_RX_CLK_VLD_FRC_VAL",
    "PMD_RX_LOCK",
    "PMD_RX_LOCK_CHANGE",
    "PMD_TX_CLK_VLD_FRC",
    "PMD_TX_CLK_VLD_FRC_VAL",
    "PMD_TX_DISABLE_PIN_DIS",
    "POST_TAP_LIMIT",
    "POST_TAP_PRESET_VAL",
    "PRBS_CHK_CLK_EN_FRC_ON",
    "PRBS_CHK_EN",
    "PRBS_CHK_EN_AUTO_MODE",
    "PRBS_CHK_EN_TIMEOUT",
    "PRBS_CHK_EN_TIMER_MODE",
    "PRBS_CHK_ERR_CNT_BURST_MODE",
    "PRBS_CHK_ERR_CNT_LSB",
    "PRBS_CHK_ERR_CNT_MSB",
    "PRBS_CHK_INV",
    "PRBS_CHK_LOCK",
    "PRBS_CHK_LOCK_CNT",
    "PRBS_CHK_LOCK_LOST_LH",
    "PRBS_CHK_MODE",
    "PRBS_CHK_MODE_SEL",
    "PRBS_CHK_OOL_CNT",
    "PRBS_GEN_EN",
    "PRBS_GEN_ERR_INS",
    "PRBS_GEN_INV",
    "PRBS_GEN_MODE_SEL",
    "PRE_FREQ_DET_TIME",
    "PRE_TAP_LIMIT",
    "PRE_TAP_PRESET_VAL",
    "PWRDN_SEQ_TIMER",
    "REFCLK_DIVCNT",
    "REFCLK_DIVCNT_SEL",
    "RESCAL_FRC",
    "RESCAL_FRC_VAL",
    "RESCAL_IN",
    "RESTART_PI_EXT_MODE",
    "RESTART_PMD_RESTART",
    "RESTART_SIGDET",
    "RES_CAL_CNTR",
    "RETRY_TIME",
    "REVID2",
    "REVID_BONDING",
    "REVID_CL72",
    "REVID_EEE",
    "REVID_LLP",
    "REVID_MDIO",
    "REVID_MICRO",
    "REVID_MODEL",
    "REVID_MULTIPLICITY",
    "REVID_PIR",
    "REVID_PROCESS",
    "REVID_REV_LETTER",
    "REVID_REV_NUMBER",
    "RMT_LPBK_EN",
    "RMT_LPBK_PD_EARLY_IND",
    "RMT_LPBK_PD_FRC_ON",
    "RMT_LPBK_PD_LATE_IND",
    "RMT_LPBK_PD_MODE",
    "RST_SEQ_DIS_FLT_MODE",
    "RST_SEQ_TIMER",
    "RX_AGGREGATOR_BYPASS_EN",
    "RX_DSC_LOCK",
    "RX_DSC_LOCK_FRC",
    "RX_DSC_LOCK_FRC_VAL",
    "RX_PI_MANUAL_MODE",
    "RX_PI_MANUAL_RESET",
    "RX_PI_MANUAL_STROBE",
    "RX_PI_PHASE_STEP_CNT",
    "RX_PI_PHASE_STEP_DIR",
    "RX_PI_SLICERS_EN",
    "RX_PMD_DP_INVERT",
    "RX_RESTART_PMD",
    "RX_RESTART_PMD_HOLD",
    "SDK_TX_DISABLE",
    "SEND_LMS_TO_PCS",
    "SET_MEAS_INCOMPLETE",
    "SIGDET_DP_RSTB_EN",
    "SIGNAL_DETECT",
    "SIGNAL_DETECT_CHANGE",
    "SIGNAL_DETECT_FILTER_1US",
    "SIGNAL_DETECT_FILTER_COUNT",
    "SIGNAL_DETECT_FRC",
    "SIGNAL_DETECT_FRC_VAL",
    "SIGNAL_DETECT_RAW",
    "SIGNAL_DETECT_RAW_CHANGE",
    "SIGNAL_DETECT_THRESH",
    "SLOWDN_XOR",
    "SUP_RST_SEQ_FRC",
    "SUP_RST_SEQ_FRC_VAL",
    "TAP_SUM_MAX_VAL",
    "TDR_BIT_SEL",
    "TDR_CYCLE_BIN",
    "TDR_CYCLE_SEL",
    "TDR_TRNSUM_EN",
    "TIMER_DONE_FRC",
    "TIMER_DONE_FRC_VAL",
    "TRNSUM_CLR_FRC",
    "TRNSUM_CLR_FRC_VAL",
    "TRNSUM_EN",
    "TRNSUM_ERROR_COUNT_EN",
    "TRNSUM_ERR_SEL",
    "TRNSUM_EYE_CLOSURE_EN",
    "TRNSUM_E_HIGH",
    "TRNSUM_E_LOW",
    "TRNSUM_FRZ_FRC",
    "TRNSUM_FRZ_FRC_VAL",
    "TRNSUM_GAIN",
    "TRNSUM_HIGH",
    "TRNSUM_INV_PATTERN_EN",
    "TRNSUM_LOW",
    "TRNSUM_O_HIGH",
    "TRNSUM_O_LOW",
    "TRNSUM_PATTERN",
    "TRNSUM_PATTERN_BIT_EN",
    "TRNSUM_PATTERN_FULL_CHECK_OFF",
    "TRNSUM_RANDOM_TAPSEL_DISABLE",
    "TRNSUM_TAP_EN",
    "TRNSUM_TAP_RANGE_SEL",
    "TRNSUM_TAP_SIGN",
    "TRNSUM_UNSIGNED_CORR",
    "TRNSUM_UNSIGNED_FLIP",
    "TXFIR_MAIN_ADJUSTED",
    "TXFIR_MAIN_AFTER_OVR",
    "TXFIR_MAIN_OFFSET",
    "TXFIR_MAIN_OVERRIDE",
    "TXFIR_OVERRIDE_EN",
    "TXFIR_POST2",
    "TXFIR_POST2_ADJUSTED",
    "TXFIR_POST2_OFFSET",
    "TXFIR_POST3",
    "TXFIR_POST3_ADJUSTED",
    "TXFIR_POST3_OFFSET",
    "TXFIR_POST_ADJUSTED",
    "TXFIR_POST_AFTER_OVR",
    "TXFIR_POST_OFFSET",
    "TXFIR_POST_OVERRIDE",
    "TXFIR_PRE_ADJUSTED",
    "TXFIR_PRE_AFTER_OVR",
    "TXFIR_PRE_OFFSET",
    "TXFIR_PRE_OVERRIDE",
    "TX_DISABLE_OUTPUT_SEL",
    "TX_DISABLE_TIMER_CTRL",
    "TX_EEE_ALERT_EN",
    "TX_EEE_QUIET_EN",
    "TX_LANE_MAP_0",
    "TX_LANE_MAP_1",
    "TX_LANE_MAP_2",
    "TX_LANE_MAP_3",
    "TX_MUX_SEL_ORDER",
    "TX_PCS_NATIVE_ANA_FRMT_EN",
    "TX_PI_EN",
    "TX_PI_EXT_CTRL_EN",
    "TX_PI_EXT_PHASE_BWSEL_INTEG",
    "TX_PI_FIRST_ORDER_BWSEL_INTEG",
    "TX_PI_FRC_PHASE_STEP_MUX_SEL",
    "TX_PI_FREQ_OVERRIDE_EN",
    "TX_PI_FREQ_OVERRIDE_VAL",
    "TX_PI_FRZ_FRC",
    "TX_PI_FRZ_FRC_VAL",
    "TX_PI_FRZ_MODE",
    "TX_PI_INTEG1_REG",
    "TX_PI_INTEG2_REG",
    "TX_PI_JITTER_FILTER_EN",
    "TX_PI_JIT_AMP",
    "TX_PI_JIT_FREQ_IDX",
    "TX_PI_JIT_SSC_FREQ_MODE",
    "TX_PI_LANE_SEL_FRC",
    "TX_PI_LANE_SEL_FRC_VAL",
    "TX_PI_LOOP_FILTER_STABLE",
    "TX_PI_LOOP_TIMING_SRC_SEL",
    "TX_PI_PHASE_CNTR",
    "TX_PI_PHASE_ERR",
    "TX_PI_PHASE_INVERT",
    "TX_PI_PHASE_OVERRIDE",
    "TX_PI_PHASE_STEP_DIR",
    "TX_PI_PHASE_STEP_NUM",
    "TX_PI_PHASE_STROBE",
    "TX_PI_RESET_CODE_DBG",
    "TX_PI_RMT_LPBK_BYPASS_FLT",
    "TX_PI_SECOND_ORDER_BWSEL_INTEG",
    "TX_PI_SECOND_ORDER_LOOP_EN",
    "TX_PI_SJ_GEN_EN",
    "TX_PI_SSC_GEN_EN",
    "TX_PMD_DP_INVERT",
    "TX_S_CLKGATE_FRC_ON",
    "TX_S_COMCLK_FRC_ON",
    "TX_S_COMCLK_SEL",
    "UC_ACK_CORE_CFG_DONE",
    "UC_ACK_CORE_DP_RESET",
    "UC_ACK_DSC_CONFIG",
    "UC_ACK_DSC_EEE_DONE",
    "UC_ACK_DSC_RESET",
    "UC_ACK_DSC_RESTART",
    "UC_ACK_LANE_CFG_DONE",
    "UC_ACK_LANE_DP_RESET",
    "UC_ACTIVE",
    "UC_DSC_ERROR_FOUND",
    "UC_DSC_GP_UC_REQ",
    "UC_DSC_READY_FOR_CMD",
    "UC_DSC_SCRATCH",
    "UC_DSC_SUPP_INFO",
    "UC_TRNSUM_EN",
    "UC_TUNE_EN",
    "VCO_DONE_EN",
    "VCO_RST_EN",
    "VCO_START_TIME",
    "VCO_STEP_TIME",
    "VGA3_CTRL_BIN",
    "VGA_ACC_HYS_EN",
    "VGA_BIN",
    "VGA_CTRL_BIN",
    "VGA_EN",
    "VGA_ERR_GAIN",
    "VGA_ERR_SEL",
    "VGA_INV_M1",
    "VGA_INV_P1",
    "VGA_P1_ACC_CLR",
    "VGA_P1_GRADIENT_INVERT",
    "VGA_PATTERN",
    "VGA_PATTERN_BIT_EN",
    "VGA_TABLEMAP_DISABLE",
    "VGA_UPDATE_GAIN",
    "WAIT_CNTR_LIMIT",
    "WIN_CAL_CNTR",
};

#endif
#endif
#endif
#endif /* PHYMOD_CONFIG_INCLUDE_FIELD_INFO */



/*******************************************************************************
 *
 * The following is the symbol table itself. 
 * It defines the entries for all registers and memories.
 * It also incorporates the field information for each register and memory if
 * applicable.
 */
static const phymod_symbol_t bcmi_eagle_xgxs_syms[] = {
#ifndef PHYMOD_CONFIG_EXCLUDE_CHIP_SYMBOLS_BCMI_EAGLE_XGXS
{
	BCMI_EAGLE_XGXS_ACC_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_ACC_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"ACC_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MDIO_CL22_IEEE_COM_ACC_CTRL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_ACC_ADDR_DATAr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_ACC_ADDR_DATAr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"ACC_ADDR_DATAr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MDIO_CL22_IEEE_COM_ACC_ADDR_DATA",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CL72_TXBASE_R_PMD_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CL72_TXBASE_R_PMD_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXBASE_R_PMD_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_IEEE_TX_BASE_R_PMD_CONTROL_REGISTER_150",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CL72_TXBASE_R_PMD_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CL72_TXBASE_R_PMD_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXBASE_R_PMD_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_IEEE_TX_BASE_R_PMD_STATUS_REGISTER_151",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CL72_TXBASE_R_LP_COEFF_UPDr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CL72_TXBASE_R_LP_COEFF_UPDr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXBASE_R_LP_COEFF_UPDr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_IEEE_TX_BASE_R_LP_COEFF_UPDATE_REGISTER_152",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CL72_RXBASE_R_LD_STS_REPr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CL72_RXBASE_R_LD_STS_REPr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_RXBASE_R_LD_STS_REPr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_IEEE_RX_BASE_R_LD_STATUS_REPORT_REGISTER_153",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CL72_TXBASE_R_LD_COEFF_UPDr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CL72_TXBASE_R_LD_COEFF_UPDr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXBASE_R_LD_COEFF_UPDr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_IEEE_TX_BASE_R_LD_COEFF_UPDATE_REGISTER_154",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CL72_TXBASE_R_LD_STS_REPr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CL72_TXBASE_R_LD_STS_REPr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXBASE_R_LD_STS_REPr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_IEEE_TX_BASE_R_LD_STATUS_REPORT_REGISTER_155",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_CDR_CTL0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_CDR_CTL0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_CDR_CTL0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_A_CDR_CONTROL_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x4, /* 4 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_CDR_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_CDR_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_CDR_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_A_CDR_CONTROL_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x690, /* 1680 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_CDR_CTL2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_CDR_CTL2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_CDR_CTL2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_A_CDR_CONTROL_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xf0, /* 240 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_RX_PI_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_RX_PI_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_RX_PI_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_A_RX_PI_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_CDR_STS_INTEGr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_CDR_STS_INTEGr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_CDR_STS_INTEGr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_A_CDR_STATUS_INTEG_REG",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_CDR_STS_PHASE_ERRr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_CDR_STS_PHASE_ERRr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_CDR_STS_PHASE_ERRr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_A_CDR_STATUS_PHASE_ERROR",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x100, /* 256 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_RX_PI_CNT_BIN_Dr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_RX_PI_CNT_BIN_Dr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_RX_PI_CNT_BIN_Dr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_A_RX_PI_CNT_BIN_D",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_RX_PI_CNT_BIN_Pr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_RX_PI_CNT_BIN_Pr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_RX_PI_CNT_BIN_Pr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_A_RX_PI_CNT_BIN_P",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x2000, /* 8192 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_RX_PI_CNT_BIN_Mr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_RX_PI_CNT_BIN_Mr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_RX_PI_CNT_BIN_Mr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_A_RX_PI_CNT_BIN_M",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x20, /* 32 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_RX_PI_DIFF_BINr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_RX_PI_DIFF_BINr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_RX_PI_DIFF_BINr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_A_RX_PI_DIFF_BIN",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_TRNSUM_CTL5r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_TRNSUM_CTL5r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_TRNSUM_CTL5r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_A_TRNSUM_CNTL_5",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_UC_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_UC_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_UC_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_A_DSC_UC_CTRL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_SCRATCHr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_SCRATCHr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_SCRATCHr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_A_DSC_SCRATCH",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_SM_CTL0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_SM_CTL0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_SM_CTL0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_B_DSC_SM_CTRL_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x8, /* 8 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_SM_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_SM_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_SM_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_B_DSC_SM_CTRL_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x200, /* 512 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_SM_CTL2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_SM_CTL2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_SM_CTL2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_B_DSC_SM_CTRL_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x87, /* 135 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_SM_CTL3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_SM_CTL3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_SM_CTL3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_B_DSC_SM_CTRL_3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x1c1e, /* 7198 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_SM_CTL4r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_SM_CTL4r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_SM_CTL4r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_B_DSC_SM_CTRL_4",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x35ad, /* 13741 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_SM_CTL5r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_SM_CTL5r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_SM_CTL5r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_B_DSC_SM_CTRL_5",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x35ad, /* 13741 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_SM_CTL6r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_SM_CTL6r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_SM_CTL6r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_B_DSC_SM_CTRL_6",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x340d, /* 13325 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_SM_CTL7r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_SM_CTL7r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_SM_CTL7r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_B_DSC_SM_CTRL_7",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_SM_CTL8r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_SM_CTL8r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_SM_CTL8r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_B_DSC_SM_CTRL_8",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x11, /* 17 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_SM_CTL9r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_SM_CTL9r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_SM_CTL9r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_B_DSC_SM_CTRL_9",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_SM_STS_DSC_LOCKr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_SM_STS_DSC_LOCKr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_SM_STS_DSC_LOCKr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_B_DSC_SM_STATUS_DSC_LOCK",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_SM_STS_DSC_ST_ONE_HOTr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_SM_STS_DSC_ST_ONE_HOTr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_SM_STS_DSC_ST_ONE_HOTr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_B_DSC_SM_STATUS_DSC_STATE_ONE_HOT",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_SM_STS_DSC_ST_EEE_ONE_HOTr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_SM_STS_DSC_ST_EEE_ONE_HOTr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_SM_STS_DSC_ST_EEE_ONE_HOTr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_B_DSC_SM_STATUS_DSC_STATE_EEE_ONE_HOT",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_SM_STS_RESTARTr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_SM_STS_RESTARTr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_SM_STS_RESTARTr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_B_DSC_SM_STATUS_RESTART",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_SM_STS_DSC_STr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_SM_STS_DSC_STr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_SM_STS_DSC_STr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_B_DSC_SM_STATUS_DSC_STATE",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_DFE_COMMON_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_DFE_COMMON_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_DFE_COMMON_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_C_DFE_COMMON_CTL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_DFE_1_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_DFE_1_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_DFE_1_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_C_DFE_1_CTL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_DFE_1_PAT_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_DFE_1_PAT_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_DFE_1_PAT_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_C_DFE_1_PAT_CTL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_DFE_2_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_DFE_2_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_DFE_2_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_C_DFE_2_CTL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_DFE_2_PAT_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_DFE_2_PAT_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_DFE_2_PAT_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_C_DFE_2_PAT_CTL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_DFE_3_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_DFE_3_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_DFE_3_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_C_DFE_3_CTL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_DFE_3_PAT_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_DFE_3_PAT_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_DFE_3_PAT_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_C_DFE_3_PAT_CTL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_DFE_4_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_DFE_4_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_DFE_4_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_C_DFE_4_CTL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_DFE_4_PAT_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_DFE_4_PAT_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_DFE_4_PAT_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_C_DFE_4_PAT_CTL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_DFE_5_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_DFE_5_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_DFE_5_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_C_DFE_5_CTL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_DFE_5_PAT_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_DFE_5_PAT_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_DFE_5_PAT_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_C_DFE_5_PAT_CTL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_DFE_VGA_OVRRr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_DFE_VGA_OVRRr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_DFE_VGA_OVRRr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_C_DFE_VGA_OVERRIDE",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_VGA_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_VGA_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_VGA_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_C_VGA_CTL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_VGA_PAT_EYEDIAG_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_VGA_PAT_EYEDIAG_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_VGA_PAT_EYEDIAG_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_C_VGA_PAT_EYEDIAG_CTL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_P1_FRAC_OFFS_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_P1_FRAC_OFFS_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_P1_FRAC_OFFS_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_C_P1_FRAC_OFFS_CTL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_TRNSUM_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_TRNSUM_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_TRNSUM_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_D_TRNSUM_CTL_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_TRNSUM_CTL2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_TRNSUM_CTL2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_TRNSUM_CTL2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_D_TRNSUM_CTL_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_TRNSUM_CTL3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_TRNSUM_CTL3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_TRNSUM_CTL3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_D_TRNSUM_CTL_3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_TRNSUM_CTL4r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_TRNSUM_CTL4r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_TRNSUM_CTL4r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_D_TRNSUM_CTL_4",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_TRNSUM_STS1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_TRNSUM_STS1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_TRNSUM_STS1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_D_TRNSUM_STS_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_TRNSUM_STS2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_TRNSUM_STS2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_TRNSUM_STS2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_D_TRNSUM_STS_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_TRNSUM_STS3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_TRNSUM_STS3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_TRNSUM_STS3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_D_TRNSUM_STS_3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_TRNSUM_STS4r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_TRNSUM_STS4r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_TRNSUM_STS4r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_D_TRNSUM_STS_4",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_TRNSUM_STS5r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_TRNSUM_STS5r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_TRNSUM_STS5r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_D_TRNSUM_STS_5",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_TRNSUM_STS6r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_TRNSUM_STS6r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_TRNSUM_STS6r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_D_TRNSUM_STS_6",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_VGA_P1EYEDIAG_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_VGA_P1EYEDIAG_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_VGA_P1EYEDIAG_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_D_VGA_P1EYEDIAG_STS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_DFE_1_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_DFE_1_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_DFE_1_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_D_DFE_1_STS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_DFE_2_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_DFE_2_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_DFE_2_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_D_DFE_2_STS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_DFE_3_4_5_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_DFE_3_4_5_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_DFE_3_4_5_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_D_DFE_3_4_5_STS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_VGA_TAP_BINr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_VGA_TAP_BINr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_VGA_TAP_BINr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_D_VGA_TAP_BIN",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_E_CTRL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x20, /* 32 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_PF_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_PF_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_PF_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_E_PF_CTRL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_PF2_LOWP_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_PF2_LOWP_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_PF2_LOWP_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_E_PF2_LOWP_CTRL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_OFFS_ADJ_DATA_ODDr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_OFFS_ADJ_DATA_ODDr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_OFFS_ADJ_DATA_ODDr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_E_OFFSET_ADJ_DATA_ODD",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_OFFS_ADJ_DATA_EVENr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_OFFS_ADJ_DATA_EVENr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_OFFS_ADJ_DATA_EVENr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_E_OFFSET_ADJ_DATA_EVEN",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_OFFS_ADJ_P1_ODDr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_OFFS_ADJ_P1_ODDr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_OFFS_ADJ_P1_ODDr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_E_OFFSET_ADJ_P1_ODD",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_OFFS_ADJ_P1_EVENr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_OFFS_ADJ_P1_EVENr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_OFFS_ADJ_P1_EVENr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_E_OFFSET_ADJ_P1_EVEN",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_OFFS_ADJ_M1_ODDr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_OFFS_ADJ_M1_ODDr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_OFFS_ADJ_M1_ODDr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_E_OFFSET_ADJ_M1_ODD",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_OFFS_ADJ_M1_EVENr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_OFFS_ADJ_M1_EVENr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_OFFS_ADJ_M1_EVENr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_E_OFFSET_ADJ_M1_EVEN",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DSC_DC_OFFSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DSC_DC_OFFSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DSC_DC_OFFSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DSC_E_DC_OFFSET",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CL72_RXRCVD_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CL72_RXRCVD_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_RXRCVD_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_USER_RX_RCVD_STATUS_REGISTER",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CL72_RXMISC1_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CL72_RXMISC1_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_RXMISC1_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_USER_RX_MISC1_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x4, /* 4 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CL72_RXDBG2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CL72_RXDBG2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_RXDBG2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_USER_RX_DEBUG_2_REGISTER",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x96, /* 150 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CL72_RXCL72_LP_CTL_PAGEr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CL72_RXCL72_LP_CTL_PAGEr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_RXCL72_LP_CTL_PAGEr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_USER_RX_CL72_LP_CONTROL_PAGE",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CL72_RXCL72_STS1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CL72_RXCL72_STS1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_RXCL72_STS1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_USER_RX_CL72_STATUS1_REGISTER",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CL72_TXXMT_UPDr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CL72_TXXMT_UPDr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXXMT_UPDr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_USER_TX_XMT_UPDATE_REGISTER",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CL72_TXMISC2_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CL72_TXMISC2_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXMISC2_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_USER_TX_MISC2_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x4, /* 4 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CL72_TXDBG3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CL72_TXDBG3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXDBG3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_USER_TX_DEBUG_3_REGISTER",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x2, /* 2 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CL72_TXPCS_INTERFACE_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CL72_TXPCS_INTERFACE_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXPCS_INTERFACE_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_USER_TX_PCS_INTERFACE_CONTROL_REGISTER",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CL72_TXCL72_LD_STS_PAGEr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CL72_TXCL72_LD_STS_PAGEr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXCL72_LD_STS_PAGEr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_USER_TX_CL72_LD_STATUS_PAGE",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CL72_TXCL72_READY_FOR_CMDr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CL72_TXCL72_READY_FOR_CMDr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXCL72_READY_FOR_CMDr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_USER_TX_CL72_READY_FOR_CMD_REGISTER",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x1, /* 1 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CL72_TXKR_DFLT_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CL72_TXKR_DFLT_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXKR_DFLT_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_USER_TX_KR_DEFAULT_CONTROL1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x588, /* 1416 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CL72_TXKR_DFLT_CTL2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CL72_TXKR_DFLT_CTL2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXKR_DFLT_CTL2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_USER_TX_KR_DEFAULT_CONTROL2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x3c, /* 60 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CL72_TXMISC_COEFF_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CL72_TXMISC_COEFF_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXMISC_COEFF_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_USER_TX_MISC_COEFF_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x83, /* 131 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CL72_TXCL72_LD_XMT_STS_PAGE_OVRRr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CL72_TXCL72_LD_XMT_STS_PAGE_OVRRr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXCL72_LD_XMT_STS_PAGE_OVRRr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_USER_TX_CL72_LD_XMT_STATUS_PAGE_OVERRIDE",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CL72_TXCL72_TX_DBG_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CL72_TXCL72_TX_DBG_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXCL72_TX_DBG_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CL72_USER_TX_CL72_TX_DEBUG_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TX_PI_CTL0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TX_PI_CTL0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_PI_CTL0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_PI_COM_CONTROL_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x2000, /* 8192 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TX_PI_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TX_PI_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_PI_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_PI_COM_CONTROL_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TX_PI_CTL2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TX_PI_CTL2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_PI_CTL2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_PI_COM_CONTROL_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TX_PI_CTL3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TX_PI_CTL3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_PI_CTL3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_PI_COM_CONTROL_3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x100, /* 256 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TX_PI_CTL4r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TX_PI_CTL4r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_PI_CTL4r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_PI_COM_CONTROL_4",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x4, /* 4 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TX_PI_CTL6r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TX_PI_CTL6r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_PI_CTL6r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_PI_COM_CONTROL_6",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TX_PI_STS0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TX_PI_STS0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_PI_STS0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_PI_COM_STATUS_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TX_PI_STS1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TX_PI_STS1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_PI_STS1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_PI_COM_STATUS_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TX_PI_STS2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TX_PI_STS2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_PI_STS2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_PI_COM_STATUS_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TX_PI_STS3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TX_PI_STS3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TX_PI_STS3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_PI_COM_STATUS_3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CKRST_OSR_MODE_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CKRST_OSR_MODE_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CKRST_OSR_MODE_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CKRST_CTRL_OSR_MODE_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CKRST_LN_CLK_RST_N_PWRDWN_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CKRST_LN_CLK_RST_N_PWRDWN_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CKRST_LN_CLK_RST_N_PWRDWN_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CKRST_CTRL_LANE_CLK_RESET_N_POWERDOWN_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CKRST_LN_AFE_RST_PWRDWN_CTL_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CKRST_LN_AFE_RST_PWRDWN_CTL_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CKRST_LN_AFE_RST_PWRDWN_CTL_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CKRST_CTRL_LANE_AFE_RESET_PWRDWN_CONTROL_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CKRST_LN_RST_N_PWRDN_PIN_KILL_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CKRST_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CKRST_LN_RST_N_PWRDN_PIN_KILL_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CKRST_CTRL_LANE_RESET_N_PWRDN_PIN_KILL_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CKRST_LN_DBG_RST_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CKRST_LN_DBG_RST_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CKRST_LN_DBG_RST_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CKRST_CTRL_LANE_DEBUG_RESET_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x303, /* 771 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CKRST_UC_ACK_LN_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CKRST_UC_ACK_LN_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CKRST_UC_ACK_LN_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CKRST_CTRL_UC_ACK_LANE_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CKRST_LN_RST_OCC_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CKRST_LN_RST_OCC_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CKRST_LN_RST_OCC_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CKRST_CTRL_LANE_REG_RESET_OCCURRED_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x1, /* 1 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CKRST_CLK_N_RST_DBG_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CKRST_CLK_N_RST_DBG_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CKRST_CLK_N_RST_DBG_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CKRST_CTRL_CLOCK_N_RESET_DEBUG_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CKRST_PMD_LN_MODE_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CKRST_PMD_LN_MODE_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CKRST_PMD_LN_MODE_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CKRST_CTRL_PMD_LANE_MODE_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CKRST_LN_DP_RST_ST_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CKRST_LN_DP_RST_ST_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CKRST_LN_DP_RST_ST_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CKRST_CTRL_LANE_DP_RESET_STATE_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x7, /* 7 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CKRST_LN_MCST_MASK_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CKRST_LN_MCST_MASK_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CKRST_LN_MCST_MASK_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CKRST_CTRL_LANE_MULTICAST_MASK_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CKRST_OSR_MODE_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CKRST_OSR_MODE_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CKRST_OSR_MODE_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CKRST_CTRL_OSR_MODE_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CKRST_OSR_MODE_PIN_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CKRST_OSR_MODE_PIN_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CKRST_OSR_MODE_PIN_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CKRST_CTRL_OSR_MODE_PIN_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CKRST_LN_S_RSTB_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CKRST_LN_S_RSTB_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CKRST_LN_S_RSTB_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"CKRST_CTRL_LN_S_RSTB_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x1, /* 1 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_AMS_RX_CTL0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_AMS_RX_CTL0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_RX_CTL0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_RX_CONTROL_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x10, /* 16 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_AMS_RX_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_AMS_RX_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_RX_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_RX_CONTROL_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_AMS_RX_CTL2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_AMS_RX_CTL2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_RX_CTL2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_RX_CONTROL_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x2800, /* 10240 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_AMS_RX_CTL3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_AMS_RX_CTL3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_RX_CTL3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_RX_CONTROL_3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_AMS_RX_CTL4r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_AMS_RX_CTL4r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_RX_CTL4r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_RX_CONTROL_4",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_AMS_RX_INTCTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_AMS_RX_INTCTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_RX_INTCTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_RX_INTCTRL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_AMS_RX_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_AMS_RX_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_RX_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_RX_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x8000, /* 32768 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_AMS_TX_CTL0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_AMS_TX_CTL0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_TX_CTL0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_TX_CONTROL_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x80, /* 128 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_AMS_TX_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_AMS_TX_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_TX_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_TX_CONTROL_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_AMS_TX_CTL2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_AMS_TX_CTL2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_TX_CTL2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_TX_CONTROL_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xc, /* 12 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_AMS_TX_INTCTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_AMS_TX_INTCTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_TX_INTCTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_TX_INTCTRL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_AMS_TX_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_AMS_TX_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_TX_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_TX_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_AMS_CTL0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_AMS_CTL0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_CTL0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_COM_CONTROL_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_AMS_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_AMS_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_COM_CONTROL_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x8001, /* 32769 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_AMS_CTL2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_AMS_CTL2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_CTL2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_COM_CONTROL_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x16, /* 22 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_AMS_CTL3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_AMS_CTL3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_CTL3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_COM_CONTROL_3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_AMS_CTL4r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_AMS_CTL4r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_CTL4r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_COM_CONTROL_4",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x77, /* 119 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_AMS_CTL5r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_AMS_CTL5r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_CTL5r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_COM_CONTROL_5",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x7bc0, /* 31680 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_AMS_CTL6r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_AMS_CTL6r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_CTL6r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_COM_CONTROL_6",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x45c0, /* 17856 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_AMS_CTL7r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_AMS_CTL7r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_CTL7r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_COM_CONTROL_7",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_AMS_CTL8r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_AMS_CTL8r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_CTL8r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_COM_CONTROL_8",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_AMS_INTCTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_AMS_INTCTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_INTCTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_COM_INTCTRL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_AMS_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_AMS_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"AMS_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"AMS_COM_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x300a, /* 12298 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_SIGDET_CTL0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_SIGDET_CTL0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SIGDET_CTL0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SIGDET_CTRL_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x1109, /* 4361 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_SIGDET_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_SIGDET_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SIGDET_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SIGDET_CTRL_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xa008, /* 40968 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_SIGDET_CTL2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_SIGDET_CTL2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SIGDET_CTL2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SIGDET_CTRL_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x3f22, /* 16162 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_SIGDET_STS0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_SIGDET_STS0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"SIGDET_STS0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"SIGDET_STATUS_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x200, /* 512 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TLB_RX_PRBS_CHK_CNT_CFGr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TLB_RX_PRBS_CHK_CNT_CFGr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TLB_RX_PRBS_CHK_CNT_CFGr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TLB_RX_PRBS_CHK_CNT_CONFIG",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x602, /* 1538 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TLB_RX_PRBS_CHK_CFGr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TLB_RX_PRBS_CHK_CFGr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TLB_RX_PRBS_CHK_CFGr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TLB_RX_PRBS_CHK_CONFIG",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xa, /* 10 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TLB_RX_DIG_LPBK_CFGr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TLB_RX_DIG_LPBK_CFGr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TLB_RX_DIG_LPBK_CFGr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TLB_RX_DIG_LPBK_CONFIG",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x6, /* 6 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TLB_RX_TLB_RX_MISC_CFGr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TLB_RX_TLB_RX_MISC_CFGr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TLB_RX_TLB_RX_MISC_CFGr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TLB_RX_TLB_RX_MISC_CONFIG",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TLB_RX_PRBS_CHK_EN_TMR_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TLB_RX_PRBS_CHK_EN_TMR_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TLB_RX_PRBS_CHK_EN_TMR_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TLB_RX_PRBS_CHK_EN_TIMER_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TLB_RX_DIG_LPBK_PD_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TLB_RX_DIG_LPBK_PD_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TLB_RX_DIG_LPBK_PD_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TLB_RX_DIG_LPBK_PD_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x2, /* 2 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TLB_RX_PRBS_CHK_LOCK_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TLB_RX_PRBS_CHK_LOCK_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TLB_RX_PRBS_CHK_LOCK_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TLB_RX_PRBS_CHK_LOCK_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TLB_RX_PRBS_CHK_ERR_CNT_MSB_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TLB_RX_PRBS_CHK_ERR_CNT_MSB_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TLB_RX_PRBS_CHK_ERR_CNT_MSB_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TLB_RX_PRBS_CHK_ERR_CNT_MSB_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x8000, /* 32768 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TLB_RX_PRBS_CHK_ERR_CNT_LSB_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TLB_RX_PRBS_CHK_ERR_CNT_LSB_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TLB_RX_PRBS_CHK_ERR_CNT_LSB_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TLB_RX_PRBS_CHK_ERR_CNT_LSB_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TLB_RX_PMD_RX_LOCK_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TLB_RX_PMD_RX_LOCK_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TLB_RX_PMD_RX_LOCK_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TLB_RX_PMD_RX_LOCK_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TLB_TX_PATGEN_CFGr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TLB_TX_PATGEN_CFGr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TLB_TX_PATGEN_CFGr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TLB_TX_PATT_GEN_CONFIG",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xb000, /* 45056 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TLB_TX_PRBS_GEN_CFGr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TLB_TX_PRBS_GEN_CFGr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TLB_TX_PRBS_GEN_CFGr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TLB_TX_PRBS_GEN_CONFIG",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xa, /* 10 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TLB_TX_RMT_LPBK_CFGr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TLB_TX_RMT_LPBK_CFGr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TLB_TX_RMT_LPBK_CFGr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TLB_TX_RMT_LPBK_CONFIG",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x2, /* 2 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TLB_TX_TLB_TX_MISC_CFGr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TLB_TX_TLB_TX_MISC_CFGr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TLB_TX_TLB_TX_MISC_CFGr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TLB_TX_TLB_TX_MISC_CONFIG",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TLB_TX_TX_PI_LOOP_TIMING_CFGr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TLB_TX_TX_PI_LOOP_TIMING_CFGr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TLB_TX_TX_PI_LOOP_TIMING_CFGr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TLB_TX_TX_PI_LOOP_TIMING_CONFIG",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TLB_TX_RMT_LPBK_PD_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TLB_TX_RMT_LPBK_PD_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TLB_TX_RMT_LPBK_PD_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TLB_TX_RMT_LPBK_PD_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x2, /* 2 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DIG_REVID0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DIG_REVID0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DIG_REVID0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DIG_COM_REVID0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x2da, /* 730 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DIG_RST_CTL_PMDr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DIG_RST_CTL_PMDr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DIG_RST_CTL_PMDr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DIG_COM_RESET_CONTROL_PMD",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x1, /* 1 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DIG_RST_CTL_CORE_DPr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DIG_RST_CTL_CORE_DPr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DIG_RST_CTL_CORE_DPr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DIG_COM_RESET_CONTROL_CORE_DP",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x4000, /* 16384 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DIG_CORE_MCST_MASK_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DIG_CORE_MCST_MASK_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DIG_CORE_MCST_MASK_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DIG_COM_CORE_MULTICAST_MASK_CONRTOL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DIG_TOP_USER_CTL0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DIG_TOP_USER_CTL0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DIG_TOP_USER_CTL0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DIG_COM_TOP_USER_CONTROL_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x271, /* 625 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DIG_UC_ACK_CORE_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DIG_UC_ACK_CORE_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DIG_UC_ACK_CORE_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DIG_COM_UC_ACK_CORE_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DIG_CORE_RST_OCC_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DIG_CORE_RST_OCC_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DIG_CORE_RST_OCC_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DIG_COM_CORE_REG_RESET_OCCURRED_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x1, /* 1 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DIG_RST_SEQ_TMR_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DIG_RST_SEQ_TMR_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DIG_RST_SEQ_TMR_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DIG_COM_RST_SEQ_TIMER_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x8304, /* 33540 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DIG_CORE_DP_RST_ST_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DIG_CORE_DP_RST_ST_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DIG_CORE_DP_RST_ST_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DIG_COM_CORE_DP_RESET_STATE_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x7, /* 7 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DIG_PMD_CORE_MODE_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DIG_PMD_CORE_MODE_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DIG_PMD_CORE_MODE_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DIG_COM_PMD_CORE_MODE_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DIG_REVID1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DIG_REVID1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DIG_REVID1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DIG_COM_REVID1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x4038, /* 16440 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DIG_TX_LN_MAP_0_1_2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DIG_TX_LN_MAP_0_1_2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DIG_TX_LN_MAP_0_1_2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DIG_COM_TX_LANE_MAP_0_1_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x820, /* 2080 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DIG_TX_LN_MAP_3_N_LN_ADDR_0_1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DIG_TX_LN_MAP_3_N_LN_ADDR_0_1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DIG_TX_LN_MAP_3_N_LN_ADDR_0_1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DIG_COM_TX_LANE_MAP_3_N_LANE_ADDR_0_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x403, /* 1027 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DIG_LN_ADDR_2_3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DIG_LN_ADDR_2_3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DIG_LN_ADDR_2_3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DIG_COM_LANE_ADDR_2_3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x302, /* 770 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_DIG_REVID2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_DIG_REVID2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"DIG_REVID2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"DIG_COM_REVID2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_PATGEN_SEQ0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_PATGEN_SEQ0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PATGEN_SEQ0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PATT_GEN_COM_SEQ_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff00, /* 65280 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_PATGEN_SEQ1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_PATGEN_SEQ1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PATGEN_SEQ1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PATT_GEN_COM_SEQ_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff00, /* 65280 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_PATGEN_SEQ2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_PATGEN_SEQ2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PATGEN_SEQ2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PATT_GEN_COM_SEQ_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff00, /* 65280 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_PATGEN_SEQ3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_PATGEN_SEQ3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PATGEN_SEQ3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PATT_GEN_COM_SEQ_3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff00, /* 65280 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_PATGEN_SEQ4r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_PATGEN_SEQ4r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PATGEN_SEQ4r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PATT_GEN_COM_SEQ_4",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff00, /* 65280 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_PATGEN_SEQ5r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_PATGEN_SEQ5r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PATGEN_SEQ5r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PATT_GEN_COM_SEQ_5",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff00, /* 65280 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_PATGEN_SEQ6r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_PATGEN_SEQ6r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PATGEN_SEQ6r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PATT_GEN_COM_SEQ_6",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff00, /* 65280 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_PATGEN_SEQ7r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_PATGEN_SEQ7r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PATGEN_SEQ7r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PATT_GEN_COM_SEQ_7",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff00, /* 65280 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_PATGEN_SEQ8r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_PATGEN_SEQ8r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PATGEN_SEQ8r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PATT_GEN_COM_SEQ_8",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff00, /* 65280 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_PATGEN_SEQ9r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_PATGEN_SEQ9r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PATGEN_SEQ9r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PATT_GEN_COM_SEQ_9",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff00, /* 65280 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_PATGEN_SEQ_10r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_PATGEN_SEQ_10r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PATGEN_SEQ_10r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PATT_GEN_COM_SEQ_10",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff00, /* 65280 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_PATGEN_SEQ_11r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_PATGEN_SEQ_11r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PATGEN_SEQ_11r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PATT_GEN_COM_SEQ_11",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff00, /* 65280 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_PATGEN_SEQ_12r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_PATGEN_SEQ_12r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PATGEN_SEQ_12r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PATT_GEN_COM_SEQ_12",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff00, /* 65280 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_PATGEN_SEQ_13r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_PATGEN_SEQ_13r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PATGEN_SEQ_13r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PATT_GEN_COM_SEQ_13",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff00, /* 65280 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_PATGEN_SEQ_14r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_PATGEN_SEQ_14r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PATGEN_SEQ_14r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PATT_GEN_COM_SEQ_14",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff00, /* 65280 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TXFIR_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TXFIR_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TXFIR_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_FED_TXFIR_CONTROL1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x588, /* 1416 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TXFIR_CTL2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TXFIR_CTL2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TXFIR_CTL2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_FED_TXFIR_CONTROL2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x3c, /* 60 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TXFIR_CTL3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TXFIR_CTL3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TXFIR_CTL3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_FED_TXFIR_CONTROL3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x8888, /* 34952 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TXFIR_STS1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TXFIR_STS1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TXFIR_STS1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_FED_TXFIR_STATUS1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x588, /* 1416 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TXFIR_STS2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TXFIR_STS2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TXFIR_STS2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_FED_TXFIR_STATUS2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x3c, /* 60 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TXFIR_STS3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TXFIR_STS3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TXFIR_STS3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_FED_TXFIR_STATUS3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x588, /* 1416 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TXFIR_STS4r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TXFIR_STS4r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TXFIR_STS4r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_FED_TXFIR_STATUS4",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x3c, /* 60 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TXFIR_UC_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TXFIR_UC_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TXFIR_UC_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_FED_MICRO_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TXFIR_MISC_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TXFIR_MISC_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TXFIR_MISC_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_FED_MISC_CONTROL1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x300, /* 768 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_TXFIR_CTL4r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_TXFIR_CTL4r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"TXFIR_CTL4r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_FED_TXFIR_CONTROL4",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x800, /* 2048 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_PLL_CAL_CTL0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_PLL_CAL_CTL0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PLL_CAL_CTL0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PLL_CAL_COM_CTL_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xc803, /* 51203 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_PLL_CAL_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_PLL_CAL_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PLL_CAL_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PLL_CAL_COM_CTL_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xc8ff, /* 51455 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_PLL_CAL_CTL2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_PLL_CAL_CTL2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PLL_CAL_CTL2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PLL_CAL_COM_CTL_2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xff01, /* 65281 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_PLL_CAL_CTL3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_PLL_CAL_CTL3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PLL_CAL_CTL3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PLL_CAL_COM_CTL_3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_PLL_CAL_CTL4r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_PLL_CAL_CTL4r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PLL_CAL_CTL4r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PLL_CAL_COM_CTL_4",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xa80d, /* 43021 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_PLL_CAL_CTL5r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_PLL_CAL_CTL5r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PLL_CAL_CTL5r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PLL_CAL_COM_CTL_5",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x27, /* 39 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_PLL_CAL_CTL6r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_PLL_CAL_CTL6r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PLL_CAL_CTL6r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PLL_CAL_COM_CTL_6",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x7, /* 7 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_PLL_CAL_CTL7r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_PLL_CAL_CTL7r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PLL_CAL_CTL7r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PLL_CAL_COM_CTL_7",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xa, /* 10 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_PLL_CAL_CTL_STS0r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_PLL_CAL_CTL_STS0r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PLL_CAL_CTL_STS0r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PLL_CAL_COM_CTL_STATUS_0",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_PLL_CAL_CTL_STS1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_PLL_CAL_CTL_STS1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PLL_CAL_CTL_STS1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PLL_CAL_COM_CTL_STATUS_1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_PLL_CAL_CTL_STS_DBGr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_PLL_CAL_CTL_STS_DBGr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"PLL_CAL_CTL_STS_DBGr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"PLL_CAL_COM_CTL_STATUS_DBG",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x1, /* 1 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CL72_TXC_TAP_LIMIT_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CL72_TXC_TAP_LIMIT_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXC_TAP_LIMIT_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_COM_CL72_TAP_LIMIT_CONTROL1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x7ff, /* 2047 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CL72_TXC_TAP_LIMIT_CTL2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CL72_TXC_TAP_LIMIT_CTL2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXC_TAP_LIMIT_CTL2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_COM_CL72_TAP_LIMIT_CONTROL2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x70, /* 112 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CL72_TXC_TAP_PRESET_CTLr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CL72_TXC_TAP_PRESET_CTLr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXC_TAP_PRESET_CTLr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_COM_CL72_TAP_PRESET_CONTROL",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CL72_TXC_DBG1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CL72_TXC_DBG1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXC_DBG1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_COM_CL72_DEBUG_1_REGISTER",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x3828, /* 14376 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CL72_TXC_MAX_WAIT_TMRr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CL72_TXC_MAX_WAIT_TMRr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXC_MAX_WAIT_TMRr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_COM_CL72_MAX_WAIT_TIMER_REGISTER",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x1f4, /* 500 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_CL72_TXC_WAIT_TMRr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_CL72_TXC_WAIT_TMRr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"CL72_TXC_WAIT_TMRr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"TX_COM_CL72_WAIT_TIMER_REGISTER",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0xc8, /* 200 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_UC_RAMWORDr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_UC_RAMWORDr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_RAMWORDr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_A_COM_RAMWORD",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_UC_ADDRr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_UC_ADDRr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_ADDRr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_A_COM_ADDRESS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_UC_COMMANDr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_UC_COMMANDr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_COMMANDr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_A_COM_COMMAND",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_UC_RAM_WRDATAr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_UC_RAM_WRDATAr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_RAM_WRDATAr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_A_COM_RAM_WRDATA",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_UC_RAM_RDDATAr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_UC_RAM_RDDATAr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_RAM_RDDATAr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_A_COM_RAM_RDDATA",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_UC_DWNLOAD_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_UC_DWNLOAD_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_DWNLOAD_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_A_COM_DOWNLOAD_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_UC_SFR_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_UC_SFR_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_SFR_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_A_COM_SFR_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_UC_MDIO_UC_MAILBOX_MSWr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_UC_MDIO_UC_MAILBOX_MSWr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_MDIO_UC_MAILBOX_MSWr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_A_COM_MDIO_UC_MAILBOX_MSW",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_UC_MDIO_UC_MAILBOX_LSWr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_UC_MDIO_UC_MAILBOX_LSWr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_MDIO_UC_MAILBOX_LSWr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_A_COM_MDIO_UC_MAILBOX_LSW",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_UC_UC_MDIO_MAILBOX_LSWr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_UC_UC_MDIO_MAILBOX_LSWr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_UC_MDIO_MAILBOX_LSWr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_A_COM_UC_MDIO_MAILBOX_LSW",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_UC_COMMAND2r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_UC_COMMAND2r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_COMMAND2r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_A_COM_COMMAND2",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x80f, /* 2063 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_UC_UC_MDIO_MAILBOX_MSWr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_UC_UC_MDIO_MAILBOX_MSWr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_UC_MDIO_MAILBOX_MSWr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_A_COM_UC_MDIO_MAILBOX_MSW",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_UC_COMMAND3r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_UC_COMMAND3r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_COMMAND3r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_A_COM_COMMAND3",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x2, /* 2 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_UC_COMMAND4r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_UC_COMMAND4r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_COMMAND4r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_A_COM_COMMAND4",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_UC_TEMPERATURE_STSr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_UC_TEMPERATURE_STSr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_TEMPERATURE_STSr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_A_COM_TEMPERATURE_STATUS",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_UC_PROGRAM_RAM_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_UC_PROGRAM_RAM_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_PROGRAM_RAM_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_B_COM_PROGRAM_RAM_CONTROL1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_UC_DATARAM_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_UC_DATARAM_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_DATARAM_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_B_COM_DATARAM_CONTROL1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_UC_IRAM_CTL1r,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_UC_IRAM_CTL1r_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"UC_IRAM_CTL1r",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MICRO_B_COM_IRAM_CONTROL1",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_MDIO_MASKDATAr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_MDIO_MASKDATAr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MDIO_MASKDATAr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MDIO_MMDSEL_AER_COM_MDIO_MASKDATA",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_MDIO_BCST_PORT_ADDRr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_MDIO_BCST_PORT_ADDRr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MDIO_BCST_PORT_ADDRr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MDIO_MMDSEL_AER_COM_MDIO_BRCST_PORT_ADDR",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x1f, /* 31 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_MDIO_MMD_SELr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_MDIO_MMD_SELr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MDIO_MMD_SELr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MDIO_MMDSEL_AER_COM_MDIO_MMD_SELECT",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x404d, /* 16461 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_MDIO_AERr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_MDIO_AERr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MDIO_AERr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MDIO_MMDSEL_AER_COM_MDIO_AER",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
{
	BCMI_EAGLE_XGXS_MDIO_BLK_ADDRr,
#if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
#ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_EAGLE_XGXS
	BCMI_EAGLE_XGXS_MDIO_BLK_ADDRr_fields,
#else
	0,
#endif
#endif
	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
	PHYMOD_SYMBOL_FLAG_REGISTER,
	"MDIO_BLK_ADDRr",
#if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
	"MDIO_BLK_ADDR_COM_BLK_ADDR",
	NULL,
#endif
#if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
	0x0, /* 0 */
	0,
#endif
},
#endif
};


phymod_symbols_t bcmi_eagle_xgxs_symbols = 
{
   bcmi_eagle_xgxs_syms, sizeof(bcmi_eagle_xgxs_syms)/sizeof(bcmi_eagle_xgxs_syms[0]),
#if PHYMOD_CONFIG_INCLUDE_FIELD_NAMES == 1
   bcmi_eagle_xgxs_fields
#else
   NULL
#endif
/* END OF SYMBOL FILE */
};

#endif /* PHYMOD_CONFIG_INCLUDE_CHIP_SYMBOLS */
